LTC4121 datasheet(20/30 Pages) LINER

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LTC4121/LTC4121-4.2

4121fc

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APPLICATIONS INFORMATION

For a given input and battery voltage, the inductor value

and switching frequency determines the peak-to-peak

ripplecurrentamplitudeaccordingtothefollowingformula:

∆IL =

VIN − VBAT

(

) • VBAT

fOSC • VIN •LSW

Ripple current is typically set to be within a range of 20%

to 40% of the programmed charge current, ICHG.Toobtain

a ripple current in this range, select an inductor value us-

ing the nearest standard inductance value available that

obeys the following formula:

LSW ≥

VIN(MAX) − VFLOAT

(

)•VFLOAT

fOSC • VIN(MAX) • 30% •ICHG

(

)

Then select an inductor with a saturation current rating

greater than IL(PEAK).

Input Capacitor

The LTC4121 charger is biased directly from the input

supply at the VIN pin. This supply provides large switched

currents, so a high-quality, low ESR decoupling capacitor

is recommended to minimize voltage glitches at VIN. Bulk

capacitance is a function of the desired input ripple voltage

(∆VIN), and follows the relation:

CIN(BULK) =

ICHG •

VBAT

VIN

∆VIN

(µF)

Input ripple voltages (∆VIN) above 0.01V are not recom-

mended. 10µF is typically adequate for most charger

applications, with a voltage rating of 40V.

The input capacitor also forms a pole with the source

impedance that supplies power to VIN. This R-C network

must settle within the 36ms PWMP period for the LTC4121

to accurately sample the open-circuit voltage at VIN.

Adequate settling is usually achieved in 3 to 5 R-C time

constants. To allow the LTC4121 to correctly sample the

open-circuit voltage, limit CIN to:

CIN < PWMP / (5 • RSOURCE),

where RSOURCE is the impedance of the power source.

For a solar panel this is the impedance of the panel at the

open-circuit voltage. Looking at a panel's I-V curve, the

source impedance is approximated by (VOC – VMP)/IMP.

Typically VMP is about 80% of VOC, so the solar panels

source impedance can be approximated as:

RSOURCE ≈ VOC / (5 • IMP).

Reverse Blocking

When a fully charged battery is suddenly applied to the

BAT pin, a large in-rush current charges the CIN capacitor

through the body diode of the LTC4121 topside power

switch. While the amplitude of this current can exceed

several Amps, the LTC4121 will survive provided the bat-

tery voltage is below about 11V. To completely eliminate

this in-rush current, a blocking P-channel MOSFET should

be placed in series with the BAT pin. When the battery is

the only source of power, this PMOS also serves to de-

crease battery drain current due to any load placed at VIN,

conducted through the body diode of the topside power

switch on the LTC4121. The PMOS body diode shown in

Figure 8 serves as the blocking component since CHRG is

high impedance when the battery voltage is greater than

the input voltage. When CHRG pulls low, i.e. during most

of a normal charge cycle, the PMOS is on to reduce power

dissipation. The PMOS requires a forward current rating

equal to the programmed charge current and a reverse

breakdown voltage equal to the programmed float voltage.

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