ADS1602IPFBT datasheet(21/26 Pages) BURR-BROWN

21 / 26 page

ADS1602

SBAS341B − DECEMBER 2004 − REVISED APRIL 2005

www.ti.com

ANALOG POWER DISSIPATION

An external resistor connected between the RBIAS pin

and the analog ground sets the analog current level, as

shown in Figure 52. The current is inversely proportional

to the resistor value. Table 3 shows the recommended

values of RBIAS for different CLK frequencies. Notice that

the analog current can be reduced when using a slower

frequency CLK input because the modulator has more

time to settle. Avoid adding any capacitance in parallel to

RBIAS, since this will interfere with the internal circuitry

used to set the biasing.

BIAS

RBIAS

AGND

ADS1602

Figure 52. External Resistor Used to Set Analog

Power Dissipation

Table 3. Recommended RBIAS Resistor Values for

Different CLK Frequencies

fCLK

DATA

RATE

RBIAS

TYPICAL POWER DISSIPATION

WITH REFEN HIGH

16MHz

1MHz

140k

Ω

200mW

24MHz

1.5MHz

100k

Ω

270mW

32MHz

2MHz

60k

Ω

390mW

40MHz

2.5MHz

37k

Ω

530mW

POWER DOWN (PD)

When not in use, the ADS1602 can be powered down by

taking the PD pin low. All circuitry will be shut down,

including the voltage reference. To minimize the digital

current during power down, stop the clock signal supplied

to the CLK input. There is an internal pull-up resistor of

170k

Ω on the PD pin, but it is recommended that this pin

be connected to IOVDD if not used. Make sure to allow

time for the reference to start up after exiting power-down

mode. The internal reference typically requires 15ms.

After the reference has stabilized, allow at least 100

conversions for the modulator and digital filter to settle

before retrieving data.

ADS1602IPFBT Datasheet(PDF) 21 Page - Burr-Brown (TI)

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