LTM4630 datasheet(22/136 Pages) LINER

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LTM4676A

4676afa

For more information www.linear.com/LTM4676A

operaTion

POWER MODULE INTRODUCTION

The LTM4676A is a highly configurable dual 13A out-

put standalone nonisolated switching mode step-down

DC/DC power supply with built-in EEPROM NVM (non-

volatile memory) with ECC and I2C-based PMBus/SMBus

2-wire serial communication interface capable of 400kHz

SCL bus speed. Two output voltages can be regulated

(VOUT0, VOUT1—collectively, VOUTn) with a few external

input and output capacitors and pull-up resistors. Read-

back telemetry data of average input and output voltages

and currents, Channel PWM duty cycles, and module

temperatures are continually digitized cyclically by an

integrated 16-bit ADC (analog-to-digital converter). Many

fault thresholds and responses are customizable. Data can

be autonomously saved to EEPROM when a fault occurs,

and the resulting fault log can be retrieved over I2C at a

later time, for analysis.

The LTM4676A provides precisely regulated output volt-

ages between 0.6VDC to 5.5VDC (±0.5% above 1VDC,

±5mV below 1VDC). The target output voltage can be

set according to pin-strapping resistors (VOUTnCFG and

VTRIMnCFG pins), NVM/register settings, and altered on

the fly via the I2C interface. The output voltage can be

modified by the user at any time with a write to PMBus

VOUT_COMMAND. Executing this command has a typical

latencylessthan10ms.WritestoPMBusOPERATIONhave

a typical latency less than 1ms. The NVM factory-default

switchingfrequencyis500kHzandthephase-interleaving

angle between its two channels is 180°. Channel switch-

ing frequency, phase angle, and phase relationship with

respect to the falling edge of the SYNC pin waveform can

be configured according to a pin-strap resistor (FSWPHCFG

pin) and NVM/register settings—though, not on the fly

duringregulation.The7-bitI2Cslaveaddressofthemodule

defaultstothevalueretrievedfromMFR_ADDRESS[6:0]at

power-up (factory default: 0x4F), but the least significant

four bits of the address are set by resistor pin-strapping

the ASEL pin. Bits[6:4] of MFR_ADDRESS can be writ-

ten and stored to EEPROM. Between the ASEL resistor

pin-strapanduser-configurable MFS_ADDRESS[6:4],the

LTM4676A can take on any 7-bit slave address desired.

With the exception of the ASEL pin, the module can be

configured to ignore all pin-strap resistors, if desired

(see MFR_CONFIG_ALL[6]).

The LTM4676A is a pin-compatible replacement to the

LTM4676, with enhanced feature set.

Tighter output voltage regulation accuracy (total DC

error): ±0.5% rather than ±1%, for VOUTn ≥ 1V; ±5mV

rather than ±1%, for 0.6V ≤ VOUTn < 1V.

The module’s turn-on start-up time (see tSTART in the

Electrical Characteristics table) has been reduced to

35ms (40ms, maximum, over temperature).

VOUT0 and VOUT1 are both configurable for up to

5.5VOUT.

AnLTM4676AsynchronizingtoanexternalSYNCclock

can be configured for better fault tolerance, i.e., the

behavior of a “sync slave”-configured LTM4676A can

be set to automatically operate at its nominal target

switching frequency in the absence of a SYNC clock,

rather than operate at the lower-end of its PLL sync-

capture range.

MFR_ADC_CONTROL and MFR_ADC_TELEMETRY_

STATUSarenewcommands,enablingfastertelemetry

update rates—up to 125Hz in LTM4676A, compared

to 10Hz in LTM4676, nominal.

PMBuscompliancetoVersion1.2ofPartIandPartIIof

PMBusSpecificationsdocuments.TheLTM4676Asup-

ports the PAGE_PLUS_READ, PAGE_PLUS_WRITE

and SMBALERT_MASK commands.

Improved fault logging. See Appendix C, PMBus Com-

mand Details. EEPROM enhanced with ECC.

For parallel-output applications, the differential ampli-

fier sensing VOSNS0+/VOSNS0– can be used to regulate

the paralleled VOUT0 and VOUT1 outputs. VOSNS1 can

be connected to VOSNS0+ and SGND can be connected

to power GND local to the module rather than at the

point of load sensing-point, for routing convenience

(MFR_PWM_CONFIG[7]).

Any 7-bit slave address can be assigned to the

LTM4676A. Bits [6:4] of MFR_ADDRESS are user-

configurable and can be stored to EEPROM. The least

significant nibble of MFR_ADDRESS is assigned by

the resistor pin-strap setting on the ASEL pin.

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