LTC1735 datasheet(10/32 Pages) LINER

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LTC3728L-1

3728l1fc

OPERATION

Main Control Loop

The LTC3728L-1 is a constant frequency, current mode

step-down controller with two channels operating 180

degrees out of phase. During normal operation, each top

MOSFET is turned on when the clock for that channel sets

the RS latch, and turned off when the main current com-

parator, I1, resets the RS latch. The peak inductor current

at which I1 resets the RS latch is controlled by the voltage

on the ITH pin, which is the output of each error ampliﬁer

EA. The VOSENSE pin receives the voltage feedback signal,

which is compared to the internal reference voltage by the

EA. When the load current increases, it causes a slight

decrease in VOSENSE relative to the 0.8V reference, which

in turn causes the ITH voltage to increase until the average

inductor current matches the new load current. After the

top MOSFET has turned off, the bottom MOSFET is turned

on until either the inductor current starts to reverse, as

indicated by current comparator I2, or the beginning of

the next cycle.

The top MOSFET drivers are biased from ﬂoating bootstrap

capacitor CB, which normally is recharged during each off

cycle through an external diode when the top MOSFET

turns off. As VIN decreases to a voltage close to VOUT, the

loop may enter dropout and attempt to turn on the top

MOSFET continuously. The dropout detector detects this

and forces the top MOSFET off for about 400ns every tenth

cycle to allow CB to recharge.

The main control loop is shut down by pulling the RUN/SS

pin low. Releasing RUN/SS allows an internal 1.2μA cur-

rent source to charge soft-start capacitor CSS. When CSS

reaches 1.5V, the main control loop is enabled with the ITH

voltage clamped at approximately 30% of its maximum

value. As CSS continues to charge, the ITH pin voltage is

gradually released allowing normal, full-current operation.

When both RUN/SS1 and RUN/SS2 are low, all controller

functions are shut down, including the 5V regulator.

Low Current Operation

The FCB pin is a multifunction pin providing two func-

tions: 1) to provide regulation for a secondary winding

by temporarily forcing continuous PWM operation on

both controllers; and 2) to select between

two modes

of low current operation. When the FCB pin voltage is

below 0.8V, the controller forces continuous PWM cur-

rent mode operation. In this mode, the top and bottom

MOSFETs are alternately turned on to maintain the output

voltage independent of direction of inductor current.

When the FCB pin is below VINTVCC – 2V but greater

than 0.8V, the controller enters Burst Mode operation.

Burst Mode operation sets a minimum output current

level before inhibiting the top switch and turns off the

synchronous MOSFET(s) when the inductor current goes

negative. This combination of requirements will, at low

currents, force the ITH pin below a voltage threshold that

will temporarily inhibit turn-on of both output MOSFETs

until the output voltage drops. There is 60mV of hyster-

esis in the burst comparator B tied to the ITH pin. This

hysteresis produces output signals to the MOSFETs that

turn them on for several cycles, followed by a variable

“sleep” interval depending upon the load current. The

resultant output voltage ripple is held to a very small

value by having the hysteretic comparator after the error

ampliﬁer gain block.

Frequency Synchronization

The phase-locked loop allows the internal oscillator to

be synchronized to an external source via the PLLIN pin.

The output of the phase detector at the PLLFLTR pin is

also the DC frequency control input of the oscillator that

operates over a 260kHz to 550kHz range corresponding

to a DC voltage input from 0V to 2.4V. When locked, the

PLL aligns the turn on of the top MOSFET to the rising

edge of the synchronizing signal. When PLLIN is left

open, the PLLFLTR pin goes low, forcing the oscillator to

minimum frequency.

Constant Frequency Operation

When the FCB pin is tied to INTVCC, Burst Mode opera-

tion is disabled and the forced minimum output current

requirement is removed. This provides constant frequency,

discontinuous current (preventing reverse inductor cur-

rent) operation over the widest possible output current

range. This constant frequency operation is not as efﬁcient

(Refer to Functional Diagram)

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