LT8705 datasheet(12/44 Pages) LINER

12 / 44 page

LTC7812

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PIN FUNCTIONS

VBIAS (Pin 26): Main Bias Input Supply Pin. A bypass ca-

pacitor should be tied between this pin and the SGND pins.

BG1, BG2 (Pins 31, 27): High Current Gate Drives for

Bottom N-Channel MOSFETs. Voltage swing at these pins

is from ground to INTVCC.

BOOST1, BOOST2 (Pins 32, 28): Bootstrapped Supplies

to the Top Side Floating Drivers. Capacitors are connected

between the BOOST and SW pins and Schottky diodes are

tied between the BOOST and INTVCC pins. Voltage swing

at the BOOST1 pin is from INTVCC to (VIN + INTVCC) and

at the BOOST2 pin is from INTVCC to (VOUT + INTVCC).

PGND (Exposed Pad Pin 33): Driver Power Ground. Con-

nectstothesourcesofbottomN-channelMOSFETsandthe

(–) terminal(s) of CIN. The exposed pad must be soldered

to the PCB for rated electrical and thermal performance.

OV2 (Pin 22): Overvoltage Open-Drain Logic Output for

the Boost Regulator. OV2 is pulled to ground when the

voltage on the VFB2 pin is under 110% of its set point, and

becomes high impedance when VFB2 goes over 110% of

its set point.

NC (Pin 23): No Connect. No external connection is re-

quired. This pin may be left floating or tied to another node.

INTVCC(Pin24):OutputoftheInternalLinearLowDropout

Regulator. The driver and control circuits are powered

from this voltage source. Must be decoupled to PGND

with a minimum of 4.7µF ceramic or tantalum capacitor.

EXTVCC (Pin 25): External Power Input to an Internal LDO

Connected to INTVCC. This LDO supplies INTVCC power,

bypassing the internal LDO powered from VBIAS whenever

EXTVCC is higher than 4.7V. See EXTVCC Connection in the

Applications Information section. Do not float or exceed

14V on this pin.

LT8705 Datasheet(PDF) 12 Page - Linear Technology