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LTC7812

7812fc

For more information www.linear.com/LTC7812

APPLICATIONS INFORMATION

The inductor value also has secondary effects. The tran-

sition to Burst Mode operation begins when the average

inductor current required results in a peak current below

25% of the current limit (30% for the boost) determined

by RSENSE. Lower inductor values (higher DIL) will cause

this to occur at lower load currents, which can cause a dip

in efficiency in the upper range of low current operation. In

Burst Mode operation, lower inductance values will cause

the burst frequency to decrease.

Inductor Core Selection

Once the value for L is known, the type of inductor must

be selected. High efficiency converters generally cannot

afford the core loss found in low cost powdered iron cores,

forcingtheuseofmoreexpensiveferriteormolypermalloy

cores. Actual core loss is independent of core size for a

fixedinductorvalue,butitisverydependentoninductance

selected. As inductance increases, core losses go down.

Unfortunately, increased inductance requires more turns

of wire and therefore copper losses will increase.

Ferrite designs have very low core loss and are preferred

at high switching frequencies, so design goals can con-

centrate on copper loss and preventing saturation. Ferrite

core material saturates “hard,” which means that induc-

tance collapses abruptly when the peak design current is

exceeded. This results in an abrupt increase in inductor

ripple current and consequent output voltage ripple. Do

not allow the core to saturate!

Power MOSFET Selection

Two external power MOSFETs must be selected for each

controller in the LTC7812: one N-channel MOSFET for the

top switch (main switch for the buck, synchronous for the

boost), and one N-channel MOSFET for the bottom switch

(main switch for the boost, synchronous for the buck).

Thepeak-to-peakdrivelevelsaresetbytheINTVCCvoltage.

This voltage is typically 5.4V during start-up (see EXTVCC

Pin Connection). Consequently, logic-level threshold

MOSFETs must be used in most applications. Pay close

attention to the BVDSS specification for the MOSFETs as

well; many of the logic level MOSFETs are limited to 30V

or less.

Selection criteria for the power MOSFETs include the

on-resistance RDS(ON), Miller capacitance CMILLER, input

voltage and maximum output current. Miller capacitance,

CMILLER, can be approximated from the gate charge curve

usually provided on the MOSFET manufacturers’ data

sheet. CMILLER is equal to the increase in gate charge

along the horizontal axis while the curve is approximately

flat divided by the specified change in VDS. This result is

then multiplied by the ratio of the application applied VDS

to the gate charge curve specified VDS. When the IC is

operating in continuous mode the duty cycles for the top

and bottom MOSFETs are given by:

Buck Main Switch Duty Cycle =

VOUT

VIN

Buck Sync Switch Duty Cycle =

VIN − VOUT

VIN

Boost Main Switch Duty Cycle =

VOUT − VIN

VOUT

Boost Sync Switch Duty Cycle =

VIN

VOUT

The MOSFET power dissipations at maximum output

current are given by:

PMAIN_BUCK =

VOUT

VIN

IOUT(MAX)

(

)

2 1+δ

(

)RDS(ON) +

(VIN)2

IOUT(MAX)

⎛

⎝

⎜

⎞

⎠

⎟(RDR)(CMILLER) •

VINTVCC − VTHMIN

VTHMIN

⎡

⎣

⎢

⎤

⎦

⎥(f)

PSYNC_BUCK =

VIN − VOUT

VIN

IOUT(MAX)

(

)

2 1+δ

(

)RDS(ON)

PMAIN_BOOST =

VOUT − VIN

(

)VOUT

VIN 2

IOUT(MAX)

(

)

•

1+ δ

(

)RDS(ON) +

VOUT3

VIN

⎛

⎝⎜

⎞

⎠⎟

IOUT(MAX)

⎛

⎝⎜

⎞

⎠⎟

•

RDR

(

) CMILLER

(

)•

VINTVCC − VTHMIN

VTHMIN

⎡

⎣

⎢

⎤

⎦

⎥(f)

PSYNC_BOOST =

VIN

VOUT

IOUT(MAX)

(

)

1+ δ

(

)RDS(ON)

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