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LTC3255 Datasheet(PDF) 7 Page - Linear Technology

Part # LTC3255
Description  Fixed Ratio High Power Inductorless (Charge Pump) DC/DC Controller
PDF  28 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC3255 Datasheet(HTML) 7 Page - Linear Technology

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LTC7820
7
7820fc
For more information www.linear.com/LTC7820
PIN FUNCTIONS
UV (Pin 8): Undervoltage Comparator Input. If the UV
pin voltage is lower than 0.9V, the PGOOD pin is pulled
down while the controller keeps switching. If the UV pin
voltage is higher than 1V and no faults exist, PGOOD pin
is released. Connect to INTVCC if not used.
ISENSE+ (Pin 27): Current Sense Comparator Positive
Input. Kelvin connected to the positive node of the cur-
rent sensing resistor. The current sensing resistor has to
be connected to the drain of the very top MOSFET. When
the voltage between ISENSE+ pin and ISENSE– pin is higher
than 50mV, the controller indicates an overcurrent fault
by pulling the FAULT pin down. The ISENSE+ pin is also
used to source 93mA current to the VLOW pin during the
capacitor’s pre-balancing time at power-up in voltage
divider applications. Connect directly to the drain of the
very top MOSFET if not used.
ISENSE– (Pin 28): Current Sense Comparator Negative
Input. Kelvin connected to the negative node of the current
sensing resistor. Short to ISENSE+ if not used.
RUN (Pin 6): Run Control Input. Forcing RUN below 1.14V
shutsdownthecontroller.WhenRUNishigherthan1.22V,
internal circuitry starts up. There is a 1µA pull-up current
flowing out of RUN pin when the RUN pin voltage is below
1.14V and additional 5µA current flowing out of RUN pin
when the Run pin voltage is above 1.22V.
TIMER (Pin 4): Charge Balance and Fault Timer Control
Input. A capacitor between this pin and ground sets the
amount of time to charge VLOW to VHIGH_SENSE/2 voltage
during power-up. It also sets the short-circuit retry time.
See the Application Information section for details.
FAULT (Pin 9): Open Drain Output Pin. FAULT is pulled to
ground when the VLOW_SENSE voltage is out of its window
thresholds or the voltage between ISENSE+ and ISENSE– is
higher than 50mV. FAULT pin is also pulled to ground
under INTVCC UVLO.
PGOOD (Pin 7): Open Drain Output Pin. PGOOD is pulled
to ground if there are any faults or if the UV pin indicates
an undervoltage condition.
HYS_PRGM (Pin 3): A resistor connected between this
pin and ground will program the two thresholds of the
window comparator that monitors the voltage difference
between VHIGH_SENSE/2 and VLOW_SENSE. There is a 10µA
current flowing out of this pin.
G4 (Pin 15): High Current Gate Drive for the Bottom
(Synchronous) N-Channel MOSFET. Voltage swing at this
pin is from ground to INTVCC.
G3 (Pin 17): High Current Gate Drive for the Third Upper
Most N-Channel MOSFET. This is the output of the floating
driver with a voltage swing from BOOST3 to SW3.
G2 (Pin 21): High Current Gate Drive for the Second Upper
most N-Channel MOSFET. This is the output of the floating
driver with a voltage swing from BOOST2 to VLOW.
G1 (Pin 24): High Current Gate Drive for the Upper most
N-Channel MOSFET. This is the output of the floating driver
with a voltage swing from BOOST1 to SW1.
SW1/SW3 (Pin 25/Pin 16): Switch Node Connections.
BOOST1, BOOST2, BOOST3 (Pins 23, 22, 18): Boot-
strapped supplies to the floating drivers. Capacitors are
connected between these BOOST pins and their respective
SWn and VLOW pins.
EXTVCC (Pin 11): External Power Input to EXTVCC LDO.
This LDO supplies INTVCC power whenever EXTVCC is
higher than 6.5V and VCC is higher than 7V. Do not exceed
40V on this pin.
INTVCC(Pin12):OutputoftheInternalLinearLowDropout
Regulator.Thedriverandcontrolcircuitsarepoweredfrom
thisvoltagesource.Mustbebypassedtopowergroundwith
a minimum of 4.7µF ceramic or other low ESR capacitor.
VCC (Pin 14): Power Supply for Internal Circuitry and
INTVCC Linear Regulator. A bypass capacitor should be
tied between this pin and the power ground.
VHIGH_SENSE (Pin 1): Kelvin Sensing Input. Monitor the
voltage of the drain of the top MOSFET.



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