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LT6236 Datasheet(PDF) 19 Page - Linear Technology |
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LT6236 Datasheet(HTML) 19 Page - Linear Technology |
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19 / 50 page ![]() LTC2372-16 19 237216f For more information www.linear.com/LTC2372-16 applicaTions inForMaTion Fully Differential Input Range The fully differential input range provides the widest input signal swing, configuring the ADC to digitize the differential analog input voltage to the ADC core (ADCIN+ − ADCIN−)providedthroughtheselectedMUXanaloginputs over a span of ±VREFBUF. In this range, the ADCIN+ and ADCIN− pins should be driven 180 degrees out-of-phase with respect to each other, centered around a common mode voltage (ADCIN+ + ADCIN−)/2 that is restricted to (VREFBUF/2 ± 0.1V). Both the ADCIN+ and ADCIN− pins are allowed to swing from (GND − 0.1V) to (VREFBUF + 0.1V). Unwanted signals common to both inputs are reduced by the CMRR of the ADC. The output data format may be selected as straight binary or two’s complement. Pseudo-Differential Unipolar Input Range In the pseudo-differential unipolar input range, the ADC digitizes the differential analog input voltage to the ADC core (ADCIN+ − ADCIN−) provided through the selected MUX analog inputs over a span of (0V to VREFBUF). In this range, a single-ended unipolar input signal, driven on the ADCIN+ pin, is measured with respect to the signal ground reference level, driven on the ADCIN− pin. The ADCIN+ pin is allowed to swing from (GND − 0.1V) to (VREFBUF + 0.1V), while the ADCIN− pin is restricted to (GND ± 0.1V). Unwanted signals common to both inputs are reduced by the CMRR of the ADC. The output data format is straight binary. Pseudo-Differential Bipolar Input Range In the pseudo-differential bipolar input range, the ADC digitizes the differential analog input voltage to the ADC core (ADCIN+ − ADCIN−) provided through the selected MUX analog inputs over a span of (±VREFBUF/2). In this range, a single-ended bipolar input signal, driven on the ADCIN+ pin, is measured with respect to the signal mid- scalereferencelevel,drivenontheADCIN−pin.TheADCIN+ pin is allowed to swing from (GND − 0.1V) to (VREFBUF + 0.1V), while the ADCIN− pin is restricted to (VREFBUF/2 ± 0.1V). Unwanted signals common to both inputs are reduced by the CMRR of the ADC. The output data format is two’s complement. INPUT DRIVE CIRCUITS Whether MUXOUT+/− is wired directly to ADCIN+/− or through a buffer with high input impedance, the MUX analog inputs of the LTC2372-16 are high impedance. In either case, a low impedance source can directly drive the MUX analog inputs without gain error. A high impedance source should be buffered in both cases to minimize set- tling time during acquisition and to optimize ADC linearity. For best performance, a buffer amplifier should be used to drive the MUX analog inputs of the LTC2372-16 with MUXOUT+/− wired directly to ADCIN+/−. The amplifier provides low output impedance, which produces fast settling of the analog signal during the acquisition phase. It also provides isolation between the signal source and the current spikes drawn by the MUX analog inputs when entering acquisition. Noise and Distortion The noise and distortion of the buffer amplifiers and signal sources must be considered since they add to the ADC noise and distortion. Noisy input signals should be filtered prior to the inputs of the buffers driving the MUX analog inputs with an appropriate filter to minimize noise. The simple 1-pole RC lowpass filter (LPF1) shown in Figure 5 is sufficient for many applications. Buffer amplifiers with low noise density must be selected to minimize SNR degradation. Coupling filter networks (LPF2) should be placed between the buffer outputs and MUX analog inputs to both minimize the noise contribu- tion of the buffers and reduce disturbances reflected into the buffer from MUX analog input sampling transients. If a buffer amplifier is used between MUXOUT+/− and ADCIN+/−, a coupling filter network (LPF3) should be placed between the buffer output and ADC core analog inputs to both minimize the noise contribution of the buf- fer and reduce disturbances reflected into the buffer from the ADC core analog input sampling transients. Long RC time constants at the MUX or ADC core analog inputs will slow down the settling of those inputs. Therefore, LPF2 and LPF3 typically require wider bandwidths than LPF1. |
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