LT1012 datasheet(14/24 Pages) LINER

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LTC2758

2758fb

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operaTion

Examples

1. Load DAC A with 0V to 10V range, output at zero

volts; and DAC B with ±10V range, output at zero

volts. Note the DAC outputs should change at the

same time.

a) CS/LD↓. Clock SDI:

00101111 00000000 00000011 00000000

b) CS/LD↑

Span Input register- Range of DACs set to bipolar ±10V.

c) CS/LD↓. Clock SDI:

00100000 00000000 00000001 00000000

d) CS/LD↑

Span Input register- Range of DAC A set to unipolar

0V to 10V.

e) CS/LD↓. Clock SDI:

00111111 10000000 00000000 00XXXXXX

f) CS/LD↑

Code Input register- Code of all DACs set to mid-scale.

g) CS/LD↓. Clock SDI:

00110000 00000000 00000000 00XXXXXX

h) CS/LD↑

Code Input register- Code of DAC A set to zero.

i) CS/LD↓. Clock SDI:

01001111 XXXXXXXX XXXXXXXX XXXXXXXX

j) CS/LD↑

Update all DACs for both Code and Range.

k) Alternatively steps i and j could be replaced with

LDAC

2. Load DAC B with ±2.5V range with its output at zero

volts. Use readback to check Input register contents

before updating the DAC output (i.e., before copying

Input register contents into DAC registers). Note that

after power-on, the code in Input registers is zero.

a) CS/LD↓. Clock SDI:

00110010 10000000 00000000 00XXXXXX

b) CS/LD↑

Code Input register- DAC B set to mid-scale.

c) CS/LD↓. Clock SDI:

00100010 00000000 00000100 00000000

Data out on SRO:

10000000 00000000 00000000

Verifies Code Input register- DAC B set to mid-scale.

d) CS/LD↑

Span Input register- Range of DAC B set to Bipolar

±2.5V range.

e) CS/LD↓. Clock SDI:

10100010 XXXXXXXX XXXXXXXX XXXXXXXX

Data Out on SRO:

00000000 00000100 00000000

Verifies Span Input register- DAC B set to Bipolar

±2.5V Range.

CS/LD↑

f) CS/LD↓. Clock SDI:

01000010 XXXXXXXX XXXXXXXX XXXXXXXX

g) CS/LD↑

Update DAC B for both Code and Range

h) Alternatively steps f and g could be replaced with

LDAC

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