DLPC3470 datasheet(15/70 Pages) TI1

15 / 70 page

DLPC3470

www.ti.com

DLPS110 – APRIL 2018

Product Folder Links: DLPC3470

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(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltage values are with respect to GND.

(3)

Overlap currents, if allowed to continue flowing unchecked, not only increase total power dissipation in a circuit, but degrade the circuit

reliability, thus shortening its usual operating life.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted)

(1)

MIN

MAX

UNIT

SUPPLY VOLTAGE(2)(3)

V(VDD) (core)

–0.3

1.21

V(VDDLP12) (core)

–0.3

1.32

Power + sub-LVDS

–0.3

1.96

V(VCC_INTF)

Host I/O power

–0.3

3.60

If 1.8-V power used

–0.3

1.99

If 2.5-V power used

–0.3

2.75

If 3.3-V power used

–0.3

3.60

V(VCC_FLSH)

Flash I/O power

–0.3

3.60

If 1.8-V power used

–0.3

1.96

If 2.5-V power used

–0.3

2.72

If 3.3-V power used

–0.3

3.58

V(VDD_PLLM) (MCG PLL)

–0.3

1.21

V(VDD_PLLD) (1DCG PLL)

–0.3

1.21

GENERAL

Operating junction temperature

–30

125

°C

Tstg

Storage temperature

–40

125

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic

discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)

±2000

Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2)

±500

DLPC3470 Datasheet(PDF) 15 Page - Texas Instruments

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