CMV2000 datasheet(11/64 Pages) AMSCO

11 / 64 page

Reference: CMV2000-datasheet-v3.8

CMV2000 v3 Datasheet

Page 10 of 63

2 SENSOR ARCHITECTURE

Active pixel area

1088 rows

2048 columns

Analog front end (AFE)

(gain, offset, ADCs)

LVDS block

(drivers, multiplexers)

16, 8, 4 or 2

ouputs

sequencer

SPI

Temp

sensor

Input clock

SPI signals

External driving

signals

FIGURE 2: SENSOR BLOCK DIAGRAM

Figure 2 shows the image sensor architecture. The internal sequencer generates the necessary signals for image

acquisition. The image is stored in the pixel (global shutter) and is then read out sequentially, row-by-row. On the pixel

output, an analog gain can be applied. The pixel values then passes to a column ADC cell, in which ADC conversion is

performed. The digital signals are then read out over multiple LVDS channels. Each LVDS channel reads out 128 adjacent

columns of the array. In the Y-direction, rows of interest are selected through a row-decoder which allows a flexible

windowing. Control registers are foreseen for the programming of the sensor. These register parameters are uploaded

via a four-wire SPI interface. A temperature sensor which can be read out over the SPI interface is also included.

2.1 PIXEL ARRAY

The pixel array consists of 2048 x 1088 square global shutter pixels with a pitch of 5.5µm (5.5μm x 5.5μm). This results

in an optical area of close to 2/3 optical inch (12.7mm). This means that off-the-shelf C-mount lenses can be used.

The pixels are designed to achieve maximum sensitivity with low noise and low PLS specifications. Micro lenses are

placed on top of the pixels for improved fill factor and quantum efficiency (>50%).

CMV2000 Datasheet(PDF) 11 Page - ams AG