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GMS82524TK Datasheet(PDF) 41 Page - Hynix Semiconductor |
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GMS82524TK Datasheet(HTML) 41 Page - Hynix Semiconductor |
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41 / 93 page ![]() GMS82512/16/24 HYUNDAI MicroElectronics 38 FEB. 2000 Ver 1.00 8-bit Event Counter Mode In this mode, counting up is started by an external trigger. This trigger means falling edge of the EC0 pin input. Source clock is used as an internal clock selected with tim- er mode register TM0. The contents of timer data register TDRn (n = 0,1) are compared with the contents of the up- counter Tn. If a match is found, an timer interrupt request flag TnIF is generated, and the counter is cleared to “0”. The counter is restart and count up continuously by every falling edge of the EC0 pin input. The maximum frequency applied to the EC0 pin is fXIN/2 [Hz]. In order to use event counter function, the bit 4 of the Port Mode Register PMR4(address 0D0H) is required to be set to “1”. After reset, the value of timer data register TDRn is unde- fined, it should be initialized to between 1H~FFHnot to "0"The interval period of Timer is calculated as below equation. Figure 11-6 Event Counter Mode Timing Chart Figure 11-7 Count Operation of Timer / Event counter Period (sec) 1 f XIN ----------- 2 Divide Ratio TDRn × × × = 0 1 2 1 0 n 2 n-1 n EC0 pin input Up-counter TDR1 T1IF interrupt Start count Timer 1 (T1IF) Interrupt TDR1 TIME Occur interrupt Occur interrupt stop clear & start disable enable Start & Stop T1ST T1CN Control count T1ST = 0 T1ST = 1 T1CN = 0 T1CN = 1 |
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