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X9421 Datasheet(PDF) 4 Page - Renesas Technology Corp

Part # X9421
Description  Low Noise/Low Power/SPI Bus Single Digitally Controlled (XDCP?? Potentiometer
PDF  20 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

X9421 Datasheet(HTML) 4 Page - Renesas Technology Corp

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X9421
FN8196 Rev.1.00
Page 4 of 20
January 14, 2009
X9421
(14 LD TSSOP)
TOP VIEW
X9421
(16 LD SOIC)
TOP VIEW
Pin Assignments
Pin Descriptions
Host Interface Pins
SERIAL OUTPUT (SO)
SO is a push/pull serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by the falling
edge of the serial clock.
SERIAL INPUT
SI is the serial data input pin. All opcodes, byte addresses and
data to be written to the potentiometer and pot register are
input on this pin. Data is latched by the rising edge of the serial
clock.
SERIAL CLOCK (SCK)
The SCK input is used to clock data into and out of the X9421.
CHIP SELECT (CS)
When CS is HIGH, the X9421 is deselected and the SO pin is
at high impedance, and (unless an internal write cycle is
underway) the device will be in the standby state. CS LOW
enables the X9421, placing it in the active power mode. It
should be noted that after a power-up, a HIGH to LOW
transition on CS is required prior to the start of any operation.
HOLD (HOLD)
HOLD is used in conjunction with the CS pin to select the
device. Once the part is selected and a serial sequence is
underway, HOLD may be used to pause the serial
communication with the controller without resetting the serial
sequence. To pause, HOLD must be brought LOW while SCK
is LOW. To resume communication, HOLD is brought HIGH,
again while SCK is LOW. If the pause feature is not used,
HOLD should be held HIGH at all times.
DEVICE ADDRESS (A0)
The address input is used to set the least significant bit of the
8-bit slave address. A match in the slave address serial data
stream must be made with the address input in order to initiate
RW/VW
NC
VCC
A0
HOLD
CS
S0
SI
NC
SCK
RL/VL
RH/VH
WP
VSS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
NC
SO
NC
CS
SCK
SI
VSS
NC
VCC
RL/VL
RH/VH
RW/VW
ISEN
AO
WP
NC
TSSOP
PIN NO.
SOIC
PIN NO.
SYMBOL
DESCRIPTION
1
2
SO
Serial Data Output
2, 3
3, 1, 7, 5
NC
No Connect
44
CS
Chip Select
5
5
SCK
Serial Clock
6
6
SI
Serial Data Input
7
8
VSS
System Ground
89
WP
Hardware Write Protect
9
10
A0
Device Address
10
HOLD
Device select. Pause the serial bus.
11
12
RW/VW
Wiper Terminal of the Potentiometer.
12
13
RH/VH
High Terminal of the Potentiometer.
13
14
RL/VL
Low Terminal of the Potentiometer.
14
16
VCC
System Supply Voltage



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