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DS26334 Datasheet(PDF) 79 Page - Dallas Semiconductor |
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DS26334 Datasheet(HTML) 79 Page - Dallas Semiconductor |
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79 / 115 page ![]() DS26334 3.3V, 16-Channel, E1/T1/J1 Short/Long-Haul Line Interface Unit 79 of 115 Table 6-22. Clock A Select CLKA3 TO CLKA0 CLKA (Hz) 0000 2.048M 0001 4.096M 0010 8.192M 0011 16.384M 0100 1.544M 0101 3.088M 0110 6.176M 0111 12.352M 1000 1.536M 1001 3.072M 1010 6.144M 1011 12.288M 1100 32k 1101 64k 1110 128k 1111 256k Register Name: RDULR Register Description: RCLK Disable Upon LOS Register Register Address (LIUs 1-8): 16h Bit # 7 6 5 4 3 2 1 0 Name RDULR8 RDULR7 RDULR6 RDULR5 RDULR4 RDULR3 RDULR2 RDULR1 Default 0 0 0 0 0 0 0 0 Register Address (LIUs 9-16): 36h Bit # 7 6 5 4 3 2 1 0 Name RDULR16 RDULR15 RDULR14 RDULR13 RDULR12 RDULR11 RDULR10 RDULR9 Default 0 0 0 0 0 0 0 0 Bit 7 to 0: RCLK Disable Upon LOS Register n (RDULRn). When this bit is set the RCLK for channel n is disabled upon a loss of signal and set as a low output. When reset or default RCLK will switch to MCLK upon a loss of signal within 10ms. |
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