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FSSD07 Datasheet(PDF) 11 Page - ON Semiconductor |
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FSSD07 Datasheet(HTML) 11 Page - ON Semiconductor |
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11 / 15 page  © 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com FSSD07 Rev. 1.0.2 10 Test Diagrams Select nDAT[3:0],nCMD DAT[3:0],CMD VS= 0 orVDDH I ON V ON RON = VON /ION GND VIN GND Select DAT[3:0],CMD VS I ON V ON GND GND VIN GND VIN GND GND GND Select VS = 0 or VDDH NC A I OZ VIN GND I OZ VIN GND VIN GND GND GND Each switch port tested separately. Figure 5. On Resistance Figure 6. Off Leakage R L ,R S,and CL are functions of the application environment (see AC tables for specific values). C L includes test fixture and stray capacitance. CL RL GND GND RS VS VSW GND V OUT DAT[3:0], CMD nDAT[3:0],nCMD VDDx V V OUT V tRISE = 2.5ns GND Vddx 90% 90% 10% 10% tFALL = 2.5ns Vddx /2 V ddx /2 Input - V CNTRL Output - V OUT 50% VOH VOL tOFF tON +0.15V Output - V OUT 50% VOL tON t OFF +0.15V VOH VOL V OL Figure 7. AC Test Circuit Load Figure 8. Turn On/Off Time Waveforms tRISE=2.5ns GND Vddx 90% 90% 10% 10% tFALL =2.5ns Vddx /2 V ddx/2 Input - V SW Output- V OUT 50% 50% VOH VOL tpLH tpHL RISE tFALL /2 V ddx/2 - - pLH pHL /2 - - Figure 9. Switch Propagation Delay (tPD) Waveform Figure 10. AC Test Circuit Load (CLK) R L , R Sand CL are function of application environment (see AC Tables for specific values) C L includes test fixture and stray capacitance CL GND GND RS VS VCLKI GND V OUT CLK 1CLK, 2CLK R L , R Sand CL are function of application environment (see AC Tables for specific values) C L includes test fixture and stray capacitance CL GND GND GND GND RS RS VS VCLKI GND VCLKI GND GND GND V OUT V OUT CLK 1CLK, 2CLK |
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