FUSB303

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7

In that case the FUSB303 provides functionality to resolve

to a stable attached state. This functionality can be turned

on and off via the REMEDY_EN and DCABLE_EN bits.

Multiple cases are tried and some of the register settings will

be changed to try to achieve stable attach. The I_REMEDY

interrupt will allow the processor to know that this

functionality has been triggered.

AUTOSNK Mode

When the FUSB303 is powered directly from VBAT the

AUTO_SNK_EN mode can be used to prevent the

application from attaching as a Source when the battery is

weak or disconnect and attach as a Sink.

With

AUTO_SNK_EN enabled the port will attempt to configure

as a Sink when attached to another DRP. If connected to

another Sink, the port will detach. The threshold at which

AUTOSNK can be triggered can be programmed via the

AUTH_SNK_TH bits.

The I_AUTOSNK interrupt is

triggered whenever this functionality is invoked.

Power Up, Initialization and Reset, Interrupt Operation,

requirements. This block is designed for fast mode.

Figure 5 and Figure 6 respectively.

NOTE:

Single byte write is initiated by Master with P immediately following the first data byte and slave A

S Slave Address WR

Register Address K

A

A Write Data

A Write Data K+1 A Write Data K+2

A Write Data K+N−1 A P

8bits

8bits

8bits

NOTE:

If Register is not specified Master will begin read from current register. In this case only sequence showing in Red bracket

is needed

Single or multi byte read executed from current register location (Single Byte

read is initiated by Master with NA immediately following first data byte

S Slave Address WR A Register Address K A S Slave Address RD A

Read Data K A Read Data K+1

A Read Data K+N−1NA P

8bits

8bits

8bits

8bits

Register address to Read specified

S

Start Condition

A

Acknowledge (SDA Low)

NA

NOT Acknowledge (SDA high)

WR

Write=O

RD

Read =1

P Stop Condition

From Master to Slave

From Slave to Master

When power is first applied, the FUSB303 will power up

in the configuration set by the PORT/DEBUG_N input with

Audio Accessory Support enabled and all interrupts

mode) the local processor can then re−configure the

FUSB303 to the desired mode and clear the global interrupt

INT_N/OUT3 pin is an active LOW, open drain output. This

pin indicates to the host processor that an interrupt has

occurred in the FUSB303 which needs attention. The

INT_N/OUT3 pin is in a high impedance state by default

after power−up or device reset, and the global interrupt mask

(INT_MASK in Control register) is set. After INT_MASK

bit is cleared by the local processor, the INT_N/OUT3 pin

stays high impedance in preparation of future interrupts.

When an interruptible event occurs, INT_N/OUT3 is driven

LOW and is in a high impedance state again when the

processor clears the interrupt by writing a one in the position

of the interrupt bit that was set. Subsequent to the initial

power up or reset; if the processor writes a “1” to global

interrupt mask bit when the system is already powered up,

the INT_N/OUT3 pin stays in a high impedance state and

ignores all interrupts until the global interrupt mask bit

is cleared. If an event happens that would ordinarily cause

an interrupt when the global interrupt mask bit is set, the

INT_N/OUT3 pin goes LOW when the global interrupt

mask is cleared.

Interrupt bits hold their value and to clear a specific

interrupt, a “1” needs to be written to that interrupt bit.