FUSB303

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16

Table 20. MASK

(Address: 0Eh, Reset Value: 0000_0000b, Type: Read/Write)

Bit #

Name

Size (Bits)

Description

7

Reserved

1

Do Not Use

6

M_ORIENT

1

1: Mask the I_ORIENT interrupt bit from asserting INT_N pin

5

M_FAULT

1

1: Mask the I_FAULT interrupt bit from asserting INT_N pin

4

M_VBUS_CHG

1

1: Mask the I_VBUS interrupt bit from asserting INT_N pin

3

M_AUTOSNK

1

1: Mask the I_AUTOSNK interrupt bit from asserting INT_N pin

2

M_BC_LVL

1

1: Mask the I_BC_LVL interrupt bit from asserting INT_N pin

1

M_DETACH

1

1: Mask the I_DETACH interrupt bit from asserting INT_N pin

0

M_ATTACH

1

1: Mask the I_ATTACH interrupt bit from asserting INT_N pin

12. Masking the interrupt just does not cause INT_N to be asserted. The interrupt bit will still be asserted in the Interrrupt register and so that

an all zeroes Interrupt register value is not needed for INT_N to be deasserted.

Table 21. MASK1

(Address: 0Fh, Reset Value: 0000_0000b, Type: Read/Write)

Bit #

Name

Size (Bits)

Description

7

Reserved

1

Do Not Use

6

M_REM_VBOFF

1

1: Mask the I_REM_VBOFF interrupt bit from asserting INT_N pin

5

M_REM_VBON

1

1: Mask the I_REM_VBON interrupt bit from asserting INT_N pin

4

Reserved

1

Do Not Use

3

M_REM_FAIL

1

1: Mask the I_REM_FAIL interrupt bit from asserting INT_N pin

2

M_FRC_FAIL

1

1: Mask the I_FRC_FAIL interrupt bit from asserting INT_N pin

1

M_FRC_SUCC

1

1: Mask the I_FRC_SUCC interrupt bit from asserting INT_N pin

0

M_REMEDY

1

1: Mask the I_REMEDY interrupt bit from asserting INT_N pin

13. Masking the interrupt just does not cause INT_N to be asserted. The interrupt bit will still be asserted in the Interrrupt register and so that

an all zeroes Interrupt register value is not needed for INT_N to be deasserted

Table 22. STATUS

(Address: 11h, Reset Value: 0000_0000b, Type: Read Only)

Bit #

Name

Size (Bits)

Description

7

AUTOSNK

1

1:AUTOSNK mode is activated since the VDD voltage is lower than AU-

TO_SNK_TH voltage

6

VSAFE0V

1

1: Status to indicate VBUS_DET is below vSafe0V max of 0.8 Vpin

5:4

ORIENT[1:0]

2

Status to indicate which CCx pins has the cable CC connection

00: No or unresolved connection detected

01: Cable CC is connected through the CC1 (A5) pin

10: Cable CC is connected through the CC2 (B5) pin

11: A fault has occurred during the detection

3

VBUSOK

1

1: Status to indicate VBUS_DET is in the valid VBUS 5V range

2:1

BC_LVL[1:0]

2

Thresholds that allow detection of current advertisement on CC line

00: (Ra or unattached) Sink or unattached Source

01: Rd threshold for Sink default current advertisement

10: Rd threshold for Sink 1.5 A current advertisement

11: Rd threshold for Sink 3 A current advertisement

0

ATTACH

1

1: Attached to a device or accessory of a type shown in the Type register