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UBA2074ATS Datasheet(PDF) 21 Page - NXP Semiconductors

Part # UBA2074ATS
Description  High Voltage Full-bridge control IC for CCFL backlighting
PDF  33 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

UBA2074ATS Datasheet(HTML) 21 Page - NXP Semiconductors

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UBA2074(A)
© NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 02.0 — February 2007
21 of 33
NXP Semiconductors
UBA2074(A)
High Voltage Full-bridge control IC for CCFL backlighting
IVDC(on)
total supply current on pin VDC oscillating
[2]
5mA
IVDC(on)
total supply current on pin VDC VDC=30V; oscillating
[2]
7.5
mA
IVDC(off)
total supply current on pin VDC VEN=0V
1.5
mA
IVDC(off)
total supply current on pin VDC VDC=30V; VEN=0V
2
mA
VVDD(reg)
Regulated voltage on pin VDD
VDC=30V; VEN=0V
11.3
12
12.7
V
VVDD(reg)
Regulated voltage on pin VDD
at maximum supply current
non-oscillating; IVDD=-36mA
11
V
VVDC-VVDD
Dropout voltage VDD regulator VDC=10V; oscillating;
[2]
1.5
V
Vboot
voltage drop bootstrap diode
IFSA = IFSB = 5mA
1.5
V
Ignition
Fs(max) / Fs(min)
VCO frequency ratio
2.2
2.4
2.6
VCVFB(range)
VCO voltage range
2.5
V
ICVFB(charge)
CVFB charge current
VVFB=2V, VCVFB=2V
-24
-21
-18
µA
Normal operation
Fs(min)
minimum switching frequency
CCF = 100 pF
43.0
44.8
46.6
kHz
Fs(min)
minimum switching frequency
10
100
kHz
VIFB(reg)
current regulation reference
level
1.24
1.32
1.40
V
VIFB(min)
minimum voltage of lineair
operating range
- 2.5
V
VIFB(max)
maximum voltage of linear
operating range
2.5
V
RIFB
input impedance IFB pin
VIFB = 1V
40
k
Ω
RIFB
input impedance IFB pin
VIFB = -1V
20
k
Ω
KIFB
transconductance OTA
13
16
19
µA/V
Drivers
Idriver(source)
sourcing current of drivers
VGLA, VGLB, VGHA, VGHB = 1V,
VVDD = VFSA = VFSB=12V
-180
-145
-110
mA
Rdriver(sink)
sinking resistance of drivers
VGLA, VGLB, VGHA, VGHB = 1V,
VVDD = VFSA = VFSB=12V
7.3
Ω
Tnonov(lv)
non-overlap time
0.45
0.55
0.65
µs
Tnonov(hv)
non-overlap time
VVDC=VVDD
1.2
1.4
1.6
µs
PWM dimming
FPWM
PWM frequency
100
1000
Hz
FPWM
PWM frequency
CCPWM = 33 nF
308
324
340
Hz
∆φ(min,hv)
minimum phase shift
VVDC=VVDD
22.5
o
∆φ(min,lv)
minimum phase shift
0
o
∆φ(max)
maximum phase shift
(independent of configuration)
180
o
VCSWP(low)
CSWP voltage resulting in
∆φ(min,xx)
1V
Table 5:
Characteristics …continued
Tamb =25
°C; VVDC = 15 V; VDD not connected to VDC; VEN=VVDD; CVDD=100nF; RIREF = 33 kΩ and CPWM pin connected
to a capacitor, unless otherwise specified. All voltages are measured with respect to signal ground (pin 7); currents are
positive when flowing into the IC.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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