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UBA2074ATS Datasheet(PDF) 13 Page - NXP Semiconductors |
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UBA2074ATS Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 33 page ![]() UBA2074(A) © NXP B.V. 2007. All rights reserved. Preliminary data sheet Rev. 02.0 — February 2007 13 of 33 NXP Semiconductors UBA2074(A) High Voltage Full-bridge control IC for CCFL backlighting The second way consists of interconnecting all inverters through the SYNC-pin, see Figure 13. In this case all inverters will lock to the highest of the minimum switching frequencies of all ICs in a PLL-type of way. For both synchronisation methods the waveform of the voltage on the SYNC pins looks like Figure 14 (tsync(period) = 1/Fsync). Fig 12. HF synchronization of multiple inverters with an external SYNC-signal Fig 13. HF synchronization of multiple inverters without an external SYNC-signal Fig 14. SYNC-signal waveform (as seen on the SYNC-pin of an IC) ext clk IC1 IC2 ICn SYNC SYNC SYNC R1 VDC ext clk IC1 IC2 ICn SYNC SYNC SYNC R1 VDC IC1 IC2 ICn SYNC SYNC SYNC IC1 IC2 ICn SYNC SYNC SYNC |
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