November 22, 2004

26

Philips Semiconductors

Preliminary specification

Universal LCD driver

for low multiplex rates

PCF8562

Table 14 SYNC contact resistance

The contact resistance between the SYNC input/output on each cascaded device must be controlled. If the resistance is

too high, the device will not be able to synchronize properly; this is particularly applicable to chip-on-glass applications.

The maximum SYNC contact resistance allowed for the number of devices in cascade is given in Table 14.

8

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

9

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is

desirable to take normal precautions appropriate to handling MOS devices (see “Handling MOS Devices” ).

NUMBER OF DEVICES

MAXIMUM CONTACT

RESISTANCE

2

6 000

Ω

3 to 5

2 200

Ω

6 to 10

1 200

Ω

10 to 16

700

Ω

SYMBOL

PARAMETER

MIN.

MAX.

UNIT

supply voltage

−0.5

+6.5

V

LCD supply voltage

− 0.5

+7.5

V

input voltage CLK, SYNC, SA0, OSC, A0 to A2

− 0.5

+ 0.5

V

input voltage SCL and SDA

− 0.5

+6.5

V

output voltage S0 to S39, BP0 to BP3

− 0.5

+ 0.5

V

DC input current

−10

+10

mA

DC output current

−10

+10

mA

−50

+50

mA

−50

+50

mA

−50

+50

mA

total power dissipation

−

400

mW

power dissipation per output

−

100

mW

storage temperature

−65

+150

°C