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AD5930

Data Sheet

Rev. D | Page 20 of 28

Therefore, in this example, a time interval of 20 ns × 2047 = 40 µs

is the maximum, with the minimum being 40 ns. For some

applications, this maximum time of 40 µs may be insufficient.

Therefore, to cater for sweeps that need a longer increment

interval, time-base multipliers are provided. Bit D12 and Bit D11

are dedicated to the time-base multipliers (see Table 12). A more

detailed table of the multiplier options is given in Table 13.

Table 13. Time-Base Multiplier Values

D12

D11

Multiplier Value

Multiply (1/MCLK) by 1

Multiply (1/MCLK) by 5

Multiply (1/MCLK) by 100

Multiply (1/MCLK) by 500

If MCLK is 50 MHz and a multiplier of 500 is used, then the

base interval (TBASE) is now (1/(50 MHz) x 500)) = 10 µs. Using

a multiplier of 500, the maximum increment interval is 10 µs ×

211− 1= 20.5 ms. Therefore, the option of time-base multipliers

gives the user enhanced flexibility when programming the

length of the frequency window, because any frequency can be

output for a minimum of 40 ns up to a maximum of 20.5 ms.

Length of Sweep Time

The length of time to complete a user-programmed frequency

sweep is given by the following equation:

TSWEEP = (1 + NINCR) × TBASE

Burst Time Resister (TBURST)

As previously described in the Burst Output Mode section, the

AD5930 offers the user the ability to output each frequency in

the sweep for a length of time within the increment interval

(tINT), and then return to midscale for the remainder of the time

(tINT – TBURST) before stepping to the next frequency. The burst

option must be enabled. This is done by setting Bit D7 in the

control register to 0.

Similar to the time interval register, the burst register can have

its duration as:

•

A multiple of cycles of the output frequency

•

A multiple of MCLK periods

The address for this register is given in Table 14.

Table 14. TBURST Register Bits

D15

D14

D13

D12

D11

D10 to D0

11 bits of <0…10>

Fixed number of output

waveform cycles.

11 bits of <0…10>

Fixed number of clock

periods.

However, note that when using both the increment interval

(tINT) and burst time register (TBURST), the settings for Bit D13

should be the same. In instances where they differ, the AD5930

defaults to the value programmed into the tINT register.

Similarly, Bit 12 and Bit 11, the time-base multiplier bits, always

default to the value programmed into the tINT register.

ACTIVATING AND CONTROLLING THE SWEEP

After the registers have been programmed, a 0 ≥ 1 transition on

the CTRL pin starts the sweep. The sweep always starts from

the frequency programmed into the FSTART register. It changes by

the value in the ∆F register and increases by the number of

steps in the NINCR register. However, both the time interval and

burst duration of each frequency can be internally controlled

using the tINT and TBURST registers, or externally using the CTRL

pin. The options available are:

•

Auto-increment, auto-burst control

•

External increment, auto-burst control

•

External increment, external burst control

Auto-Increment, Auto-Burst Control

The values in the tINT and TBURST registers are used to control the

sweep. The AD5930 bursts each frequency for the length of

time programmed in the TBURST register, and outputs midscale

for the remainder of the interval time (tINT – TBURST).

To set up the AD5930 to this mode, CW/BURST (Bit D7) in the

control register must be set to 0, INT/EXT BURST (Bit D6)

must be set to 0, and INT/EXT INCR (Bit D5) must be set to 0.

Note that if the part is only operating in continuous mode, then

(Bit D7) in the control register should be set to 1.

External Increment, Auto-Burst Control

The time interval, tINT, is set by the pulse rate on the CTRL pin.

The first 0 ≥1 transition on the pin starts the sweep. Each

subsequent 0 ≥1 transition on the CTRL pin increments the

output frequency by the value programmed into the ∆F register.

For each increment interval, the AD5930 outputs each

frequency for the length of time programmed into the TBURST

again. Note that for this mode, the values programmed into Bit

D13, Bit D12, and bit D11 of the TBURST register are used.

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