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DAC53608 Datasheet(PDF) 6 Page - Texas Instruments |
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DAC53608 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 32 page  6 DAC53608, DAC43608 SLASEQ4 – OCTOBER 2018 www.ti.com Product Folder Links: DAC53608 DAC43608 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated (1) End point fit between codes Code 4 to Code 1016 - 10 bit, Code 1 to Code 251 - 8 bit 7.5 Electrical Characteristics All minimum/maximum specifications at TA = -40°C to +125°C, 1.8V ≤ VDD ≤ 5.5V, VREFIN = 2.5V for VDD ≥ 2.7 V, VREFIN = 1.8V for VDD ≤ 2.7 V, RL=5kΩ to AGND, CL = 200pF to AGND, Digital inputs at VDD or AGND unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC PERFORMANCE Resolution DAC53608 10 Bits Resolution DAC43608 8 Bits INL Relative Accuracy(1) DAC43608, 2.7V ≤ VDD ≤ 5.5V –1 1 LSB INL Relative Accuracy(1) DAC43608, 1.8V ≤ VDD ≤ 2.7V –1 1 LSB INL Relative Accuracy(1) DAC53608, 2.7V ≤ VDD ≤ 5.5V –1 1 LSB INL Relative Accuracy(1) DAC53608, 1.8V ≤ VDD ≤ 2.7V –1 1 LSB DNL Differential Nonlinearity(1) DAC43608, 2.7V ≤ VDD ≤ 5.5V –1 1 LSB DNL Differential Nonlinearity(1) DAC43608, 1.8V ≤ VDD ≤ 2.7V –1 1 LSB DNL Differential Nonlinearity(1) DAC53608, 2.7V ≤ VDD ≤ 5.5V –1 1 LSB DNL Differential Nonlinearity(1) DAC53608, 1.8V ≤ VDD ≤ 2.7V –1 1 LSB ZCE Zero Code Error 2.7V ≤ VDD ≤ 5.5V, Code 0d into DAC 6 12 mV ZCE Zero Code Error 1.8V ≤ VDD ≤ 2.7V, Code 0d into DAC 6 12 mV ZCE-TC Zero Code Error Temperature Coefficient ±5 µV/°C OE Offset Error(1) 2.7V ≤ VDD ≤ 5.5V –0.5 0.25 0.5 %FSR OE Offset Error(1) 1.8V ≤ VDD ≤ 2.7V –1 0.5 1 %FSR OE-TC Offset Error Temperature Coefficient (1) ±0.0003 %FSR/° C GE Gain Error(1) 2.7V ≤ VDD ≤ 5.5V –0.5 0.25 0.5 %FSR GE Gain Error(1) 1.8V ≤ VDD ≤ 2.7V –1 0.5 1 %FSR GE-TC Gain Error Temperature Coefficient(1) ±0.0004 %FSR/° C FSE Full Scale Error 2.7V ≤ VDD ≤ 5.5V, Code 1023d into DAC, No headroom –0.5 0.25 0.5 %FSR FSE Full Scale Error 1.8V ≤ VDD ≤ 2.7V, Code 1023d into DAC, No headroom –1 0.5 1 %FSR FSE-TC Full Scale Error Temperature Coefficient ±0.0004 %FSR/° C OUTPUT CHARACTERISTICS VOUT Voltage Range 0 5.5 V CLOAD Max Capacitive Load RL = Infinite 1 nF CLOAD Max Capacitive Load RL = 5kΩ 2 nF Load regulation DAC at midscale, -10mA ≤ IOUT ≤ 10mA, VDD = 5.5V 1.5 mV/mA Short circuit current (per channel) full-scale output shorted to AGND 50 mA Short circuit current (per channel) zero output shorted to VDD 50 mA Output Voltage Headroom to VDD (DAC output unloaded) 0.05 V Output Voltage Headroom to VDD (ILOAD = 10mA@VDD = 5.5V, ILOAD = 3mA@VDD = 2.7V, ILOAD = 1mA@VDD = 1.8V), DAC code = Full Scale 10 %FSR ZO DC Output Impedance DAC at midscale 0.25 Ω ZO DC Output Impedance DAC at code 4d 0.25 Ω ZO DC Output Impedance DAC at code 1016 0.26 Ω DC- PSRR Power Supply Rejection Ratio (DC) DAC at midscale; VDD = 5 V ± 10% 0.25 mV/V DYNAMIC PERFORMANCE |
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