Multiple Range, 16-/12-Bit,

Bipolar/Unipolar, Voltage Output DACs

Data Sheet

AD5761/AD5721

Rev. C

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FEATURES

8 software-programmable output ranges: 0 V to +5 V, 0 V to

+10 V, 0 V to +16 V, 0 V to +20 V, ±3 V, ±5 V, ±10 V, −2.5 V to

+7.5 V; 5% overrange

Total unadjusted error (TUE): 0.1% FSR maximum

16-bit resolution: ±2 LSB maximum INL

Guaranteed monotonicity: ±1 LSB maximum

Single channel, 16-/12-bit DACs

Settling time: 7.5 μs typical

Integrated reference buffers

Low noise: 35 nV/√Hz

Low glitch: 1 nV-sec

1.8 V logic compatibility

Asynchronous updating via LDAC

Asynchronous RESET to zero scale/midscale

DSP/microcontroller-compatible serial interface

Robust 4 kV HBM ESD rating

Available in 16-lead TSSOP and 16-lead LFCSP

Operating temperature range: −40°C to +125°C

APPLICATIONS

Industrial automation

Instrumentation, data acquisition

Open-/closed-loop servo control, process control

Programmable logic controllers

GENERAL DESCRIPTION

The AD5761/AD5721 are single channel, 16-/12-bit serial input,

voltage output, digital-to-analog converters (DACs). They operate

from single supply voltages from +4.75 V to +30 V or dual

provide a very easy to use, universal solution.

The devices offer guaranteed monotonicity, integral nonlinearity

(INL) of ±2 LSB maximum, 35 nV/√Hz noise, and 7.5 μs settling

time on selected ranges.

The AD5761/AD5721 use a serial interface that operates at

clock rates of up to 50 MHz and are compatible with DSP and

microcontroller interface standards. Double buffering allows

the asynchronous updating of the DAC output. The input

coding is user-selectable twos complement or straight binary.

The asynchronous reset function resets all registers to their

default state. The output range is user selectable, via the

RA[2:0] bits in the control register.

The devices available in the 16-lead TSSOP and in the 16-lead

LFCSP offer guaranteed specifications over the −40°C to +125°C

industrial temperature range.

Table 1. Pin-Compatible Devices

Device

Description

AD5761R/AD5721R

AD5761/AD5721 with internal reference

FUNCTIONAL BLOCK DIAGRAM

12-BIT/

16-BIT

DAC

LDAC

REFERENCE

BUFFERS

SDI

SCLK

SYNC

SDO

RESET

INPUT SHIFT

REGISTER

AND

CONTROL

LOGIC

DGND

AGND

AD5761/AD5721

CLEAR

INPUT

REG

DAC

REG

12/16

12/16

ALERT

DNC

0V TO 5V

0V TO 10V

0V TO 16V

0V TO 20V

±3V

±5V

±10V

−2.5V TO +7.5V

NOTES

1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.

Figure 1.