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Terminal Configuration and Functions

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AM5706, AM5708

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SPRS961D – AUGUST 2016 – REVISED JULY 2018

Table 4-1. Pin Attributes(1) (continued)

BALL NUMBER

[1]

BALL NAME [2]

SIGNAL NAME [3]

PN [4]

MUXMODE

[5]

TYPE [6]

BALL

RESET

STATE [7]

BALL

RESET

REL.

STATE [8]

BALL

RESET

REL.

MUXMODE

[9]

I/O

VOLTAGE

VALUE

[10]

POWER

[11]

HYS [12]

BUFFER

TYPE [13]

PULL

UP/DOWN

TYPE [14]

DSIS [15]

H25

xref_clk3

1.8/3.3

vddshv3

Yes

Dual

Voltage

LVCMOS

PU/PD

mcasp2_axr11

mcasp1_axr7

mcasp4_ahclkx

mcasp8_ahclkx

hdq0

clkout3

timer16

gpio6_20

Driver off

(1) NA in this table stands for Not Applicable.

(2) For more information on recommended operating conditions, see Section 5.4, Recommended Operating Conditions.

(3) The pullup or pulldown block strength is equal to: minimum = 50 μA, typical = 100 μA, maximum = 250 μA.

(4) The output impedance settings of this IO cell are programmable; by default, the value is DS[1:0] = 10, this means 40

Ω. For more information on DS[1:0] register configuration, see the

Device TRM.

(5) IO drive strength for usb1_dp, usb1_dm, usb2_dp and usb2_dm: minimum 18.3 mA, maximum 89 mA (for a power supply vdda33v_usb1 and vdda33v_usb2 = 3.46 V).

(6) Minimum PU = 900 Ω, maximum PU = 3.090 kΩ and minimum PD = 14.25 kΩ, maximum PD = 24.8 kΩ.

For more information, see chapter 7 of the USB2.0 specification, in particular section Signaling / Device Speed Identification.

(7) This function will not be supported on some pin-compatible roadmap devices. Pin compatibility can be maintained in the future by not using these GPIO signals.

(8) In PUx / PDy, x and y = 60 to 200 μA.

The output impedance settings (or drive strengths) of this IO are programmable (34 Ω, 40 Ω, 48 Ω, 60 Ω, 80 Ω) depending on the values of the I[2:0] registers.

(9) The IHHV1833 buffer exists in the dual-voltage IO logic that can be powered by either 1.8V or 3.3V provided by vddshv3. However, the vddshv3 supply is only used for input protection

circuitry, not for logic functionality. The logic in this buffer operates entirely on the vdds18v supply. Therefore, these input buffers are fully functional whenever vdds18v is valid.

(10) The internal pull resistors for balls A4, E7, D6, C5, D7, C6, A5, B6 are permanently disabled when sysboot15 is set to 0 as described in the section Sysboot Configuration of the Device

TRM. If internal pull-up/down resistors are desired on these balls then sysboot15 should be set to 1. If gpmc boot mode is used with SYSBOOT15=0 (not recommended) then external

pull-downs should be implemented to keep the address bus at logic-1 value during boot since the gpmc ms-address bits are high-z during boot.

(11) This signal is valid only for High-Security devices. For more details, see Section 5.9, VPP Specification for One-Time Programmable (OTP) eFUSEs. For General Purpose devices do not

connect any signal, test point, or board trace to this signal.

AM5706 Datasheet(PDF) 65 Page - Texas Instruments

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