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AM5706 Datasheet(PDF) 71 Page - Texas Instruments |
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AM5706 Datasheet(HTML) 71 Page - Texas Instruments |
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71 / 395 page  71 AM5706, AM5708 www.ti.com SPRS961D – AUGUST 2016 – REVISED JULY 2018 Submit Documentation Feedback Product Folder Links: AM5706 AM5708 Terminal Configuration and Functions Copyright © 2016–2018, Texas Instruments Incorporated Table 4-6. EMIF Signal Descriptions (continued) SIGNAL NAME DESCRIPTION TYPE BALL ddr1_casn EMIF1 Column Address Strobe O AD16 ddr1_rasn EMIF1 Row Address Strobe O AD17 ddr1_wen EMIF1 Write Enable O AE18 ddr1_rst EMIF1 Reset output (DDR3-SDRAM only) O AE17 ddr1_ba0 EMIF1 Bank Address O AE16 ddr1_ba1 EMIF1 Bank Address O AA16 ddr1_ba2 EMIF1 Bank Address O AB16 ddr1_a0 EMIF1 Address Bus O AC18 ddr1_a1 EMIF1 Address Bus O AE19 ddr1_a2 EMIF1 Address Bus O AD19 ddr1_a3 EMIF1 Address Bus O AB19 ddr1_a4 EMIF1 Address Bus O AD20 ddr1_a5 EMIF1 Address Bus O AE20 ddr1_a6 EMIF1 Address Bus O AA18 ddr1_a7 EMIF1 Address Bus O AA20 ddr1_a8 EMIF1 Address Bus O Y21 ddr1_a9 EMIF1 Address Bus O AC20 ddr1_a10 EMIF1 Address Bus O AA21 ddr1_a11 EMIF1 Address Bus O AC21 ddr1_a12 EMIF1 Address Bus O AC22 ddr1_a13 EMIF1 Address Bus O AC15 ddr1_a14 EMIF1 Address Bus O AB15 ddr1_a15 EMIF1 Address Bus O AC16 ddr1_d0 EMIF1 Data Bus IO AA23 ddr1_d1 EMIF1 Data Bus IO AC24 ddr1_d2 EMIF1 Data Bus IO AB24 ddr1_d3 EMIF1 Data Bus IO AD24 ddr1_d4 EMIF1 Data Bus IO AB23 ddr1_d5 EMIF1 Data Bus IO AC23 ddr1_d6 EMIF1 Data Bus IO AD23 ddr1_d7 EMIF1 Data Bus IO AE24 ddr1_d8 EMIF1 Data Bus IO AA24 ddr1_d9 EMIF1 Data Bus IO W25 ddr1_d10 EMIF1 Data Bus IO Y23 ddr1_d11 EMIF1 Data Bus IO AD25 ddr1_d12 EMIF1 Data Bus IO AC25 ddr1_d13 EMIF1 Data Bus IO AB25 ddr1_d14 EMIF1 Data Bus IO AA25 ddr1_d15 EMIF1 Data Bus IO W24 ddr1_d16 EMIF1 Data Bus IO W23 ddr1_d17 EMIF1 Data Bus IO U25 ddr1_d18 EMIF1 Data Bus IO U24 ddr1_d19 EMIF1 Data Bus IO W21 ddr1_d20 EMIF1 Data Bus IO T22 ddr1_d21 EMIF1 Data Bus IO U22 ddr1_d22 EMIF1 Data Bus IO U23 ddr1_d23 EMIF1 Data Bus IO T21 |
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