AD5301 datasheet(16/24 Pages) AD

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AD5301/AD5311/AD5321

Data Sheet

Rev. C | Page 16 of 24

READ OPERATION

When reading data back from the AD5301/AD5311/AD5321

DACs, the user must begin with an address byte after which

the DAC acknowledges that it is prepared to transmit data by

pulling SDA low. There are two different read operations. In the

case of the AD5301, the readback is a single byte that consists of

the eight data bits in the DAC register. However, in the case

of the AD5311 and AD5321, the readback consists of two bytes

that contain both the data and the power-down mode bits. The

read operations for the three DACs are shown in Figure 32 to

Figure 34.

SCL

SDA

ACK

AD5301

NO ACK

MASTER

START

COND

MASTER

*THIS BIT MUST BE 0 IN THE 6-LEAD SOT-23 VERSION.

ADDRESS BYTE

A1*

R/W

STOP

COND

MASTER

DATA BYTE

Figure 32. AD5301 Readback Sequence

SCL

SDA

SCL

SDA

LEAST SIGNIFICANT CONTROL BYTE

*THIS BIT MUST BE 0 IN THE 6-LEAD SOT-23 VERSION.

NO ACK

MASTER

STOP

COND

MASTER

PD1

PD0

0A1*

R/W

ACK

AD5311

ACK

MASTER

START

COND

MASTER

MOST SIGNIFICANT BYTE

ADDRESS BYTE

Figure 33. AD5311 Readback Sequence

LEAST SIGNIFICANT BYTE

SCL

SDA

SCL

SDA

ACK

AD5321

NO ACK

MASTER

START

COND

MASTER

ACK BY

MASTER

*THIS BIT MUST BE 0 IN THE 6-LEAD SOT-23 VERSION.

ADDRESS BYTE

STOP

COND

MASTER

MOST SIGNIFICANT BYTE

A1*

R/W

PD1

PD0

D11

D10

Figure 34. AD5321 Readback Sequence

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