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UP1728PDDA Datasheet(PDF) 4 Page - uPI Group Inc. |
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UP1728PDDA Datasheet(HTML) 4 Page - uPI Group Inc. |
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4 / 12 page ![]() uP1728 4 uP1728-DS-F0000, Dec. 2012 www.upi-semi.com The uP1728 is a high efficiency synchronous-rectified buck converter with internal power switches. Fixed 1.2MHz PWM operation allows possible smallest output ripple and external component size. With high conversion efficiency and small package, the uP1728 is ideally suitable for portable devices and USB/PCIE-based interface cards where PCB area is especially concerned. With internal low R DS(ON) switches, the uP1728 is capable of delivering 3A output current over a wide input voltage range from 2.6V to 5.5V. The output voltage is adjustable from 0.6V to VIN by a voltage divider. Other features include internal soft-start, chip enable, over-voltage, under-voltage, over- temperature and over-current protections. The uP1728 is available in a space-saving WDFN3x3-10L package. Input Supply Voltages, VIN & VDD The uP1728 features separate power supply and ground pins for power stages and control circuit, isolating the control circuit from noise associated with the power MOSFET switching. The VIN pins provide current to the power stage. The supply voltage range is from 2.6V to 5.5V. The uP1728 draws pulsed current with sharp edges from VIN each time the upper switch turns on, resulting in voltage ripples and spikes at supply input. A minimum 10uF ceramic capacitor with shortest PCB trace is highly recommended for bypassing the supply input. The VDD pin provides currents for the internal control circuit. A power on reset (POR) continuously monitors the input supply voltage. The POR level is typically 2.4V at VDD rising. Use low pass filter R4 and C3 as shown in the Typical Application Circuit to filter the input noise associated with the power switching. Chip Enable/Disable and Soft-Start The uP1728 features an EN pin for enable/disable control of the output voltage. Pulling the EN pin lower than 0.4V shuts down the uP1728 and reduces its quiescent current lower than 1uA. In the shutdown mode, both upper and lower switches are turned off. Pulling EN pin higher than 1.5V enables the uP1728. Once the chip is enabled, the VDD POR is granted. The internal soft-start capacitor becomes charged and generates a linear ramping up voltage across the capacitor. This voltage clamps the voltage at the FB pin causing PWM pulse width to increase slowly and in turn reduce the output surge current. The internal 0.6V reference takes over the loop control once the internal ramping-up voltage becomes higher than 0.6V. PWM Operation The uP1728 adopts slope-compensated, current mode PWM control capable of achieving 100% duty cycle. During normal operation, the uP1728 operates at PWM mode to Functional Description regulate output voltage by transferring the power to the output voltage cycle by cycle at a constant 1.2MHz frequency. The uP1728 turns on the upper switch at each rising edge of the internal oscillator allowing the inductor current to ramp up linearly. The switch remains on until either the current-limit is tripped or the PWM comparator turns off the switch for regulating output voltage. The upper switch current is sensed, slope compensated and compared with the error amplifier output COMP to determine the adequate duty cycle. The VOUT pin senses output feedback voltage from an external resistive divider. When the load current increases, it causes a slight decrease in the feedback voltage relative to the 0.6V reference, which in turn, causes the error amplifier output voltage to increase until the average inductor current matches the new load current. Low Dropout Mode The uP1728 increases duty cycle to maintain output voltage within its regulation as the supply input drops gradually in the battery-powered applications. The uP1728 operates with 100% duty cycle and enters low dropout mode as the supply input approaches the output voltage. This maximizes the battery life. Output Voltage Setting and Feedback Network The output voltage can be set from VREF to VIN by a voltage divider as: REF OUT V 1 R 2 R 1 R V × + = The internal VREF is 0.6V with 1% accuracy. In real applications, a 22pF feed-forward ceramic capacitor is recommended in parallel with R2 for better transient response. Current Limit Function The uP1728 continuously monitors the inductor current for current limit by sensing the voltage drop across the upper switch when it turns on. When the inductor current is higher than current limit threshold (6A typical), the current limit function activates and forces the upper switch turning off to limit inductor current cycle by cycle. If the load continuously demands more current than what uP1728 could provide, uP1728 can not regulate the output voltage. Eventually under voltage protection will be triggered and shuts down the uP1728 if VOUT is too low. Under Voltage Protection Under voltage Protection is triggered if the FB voltage is lower than 0.26V. Once UVP is triggered , the uP1728 turn off high-side and low-side MOSFET. The under voltage protection is latch-off function and can only be reset by |
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