AP65550

Document number: DS36336 Rev. 5 - 2

3 of 16

www.diodes.com

January 2018

© Diodes Incorporated

AP65550

Functional Block Diagram

Internal

Reference

-

+

+

Digital Control

Logic

Ref

5V

SS

OCP

Min Off

Time

S

R

Q

+

Se

On Time

Compute

VIN

Q

One Shot

SW

Frequency

Lock Loop

Vcc

Regulator

SS

SW

UVLO

Logic

Control

5V

Soft Start

SS

EN

SS

FB

PGND

SW

BST

VREG5

VIN

GND

Figure 2 Functional Block Diagram

Symbol

Parameter

Rating

Unit

Supply Voltage

-0.3 to 20

V

VREG5 Pin Voltage

-0.3V to +6.0

V

Switch Node Voltage

-1.0 to VIN +0.3

V

Bootstrap Voltage

-0.3 to VSW +6.0

V

Feedback Voltage

-0.3V to +6.0

V

Enable/UVLO Voltage

-0.3V to +6.0

V

Soft-start PIN

-0.3V to +6.0

V

GND Pin Voltage

-0.3 to 0.3

V

Storage Temperature

-65 to +150

°C

Junction Temperature

+160

°C

Lead Temperature

+260

°C

ESD Susceptibility (Note 5)

HBM

Human Body Model

2

kV

MM

Machine Model

200

V

Notes:

4. Stresses greater than the 'Absolute Maximum Ratings' specified above may cause permanent damage to the device. These are stress

ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not

implied. Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time.

5. Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken

when handling and transporting these devices.