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LTC2436-1IGN Datasheet(PDF) 20 Page - Linear Technology |
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LTC2436-1IGN Datasheet(HTML) 20 Page - Linear Technology |
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20 / 28 page  LTC2436-1 20 24361f period. Thus, for settling errors of less than 1LSB, the driving source impedance should be chosen such that τ ≤ 14.3 µs/11 = 1.3µs. When an external oscillator of fre- quency fEOSC is used, the sampling period is 2/fEOSC and, for a settling error of less than 1LSB, τ ≤ 0.18/fEOSC. Input Current If complete settling occurs on the input, conversion re- sults will be unaffected by the dynamic input current. An incomplete settling of the input signal sampling process may result in gain and offset errors, but it will not degrade the INL performance of the converter. Figure 12 shows the mathematical expressions for the average bias currents flowing through the IN+ and IN– pins as a result of the sampling charge transfers when integrated over a sub- stantial time period (longer than 64 internal clock cycles). The effect of this input dynamic current can be analyzed using the test circuit of Figure 13. The CPAR capacitor includes the LTC2436-1 pin capacitance (5pF typical) plus the capacitance of the test fixture used to obtain the results shown in Figures 14 and 15. A careful implementation can bring the total input capacitance (CIN + CPAR) closer to 5pF thus achieving better performance than the one predicted Figure 13. An RC Network at IN+ and IN– Figure 14. +FS Error vs RSOURCE at IN + or IN– (Small CIN) APPLICATIO S I FOR ATIO CIN 24361 F13 VINCM + 0.5VIN RSOURCE IN+ LTC2436-1 CPAR ≅20pF CIN VINCM – 0.5VIN RSOURCE IN – CPAR ≅20pF RSOURCE (Ω) 1 10 100 1k 10k 100k 24361 F14 3 0 1 2 VCC = 5V REF+ = 5V REF – = GND IN+ = 5V IN– = 2.5V FO = GND TA = 25°C CIN = 0.01µF CIN = 0.001µF CIN = 100pF CIN = 0pF Figure 12. LTC2436-1 Equivalent Analog Input Circuit VREF+ VIN+ VCC RSW (TYP) 20k ILEAK ILEAK VCC ILEAK ILEAK VCC RSW (TYP) 20k CEQ 18pF (TYP) RSW (TYP) 20k ILEAK IIN+ VIN– IIN– IREF+ IREF– 24361 F12 ILEAK VCC ILEAK ILEAK SWITCHING FREQUENCY fSW = 69.900Hz INTERNAL OSCILLATOR (FO = LOW OR HIGH) fSW = 0.5 • fEOSC EXTERNAL OSCILLATOR VREF– RSW (TYP) 20k IIN VV V R IIN VV V R I REF VV V R V VR I REF VV V R V VR where AVG IN INCM REFCM EQ AVG IN INCM REFCM EQ AVG REF INCM REFCM EQ IN REF EQ AVG REF INCM REFCM EQ IN REF EQ + − + − () = +− • () = −+ − • () = •− + • − • () = −• − + • + • 05 05 15 05 15 05 2 2 . . . . . . :: ./ ./ V REF REF V REF REF VIN IN V IN IN R M INTERNAL OSCILLATOR Hz Hz Notch F LOW R f EXTERNAL OSCILLATOR REF REFCM IN INCM EQ O EQ EOSC =− = + =− = − == () =• () +− +− +− +− 2 2 397 50 60 0 555 1012 Ω |
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