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BMA423 Datasheet(PDF) 29 Page - Bosch Sensortec GmbH |
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BMA423 Datasheet(HTML) 29 Page - Bosch Sensortec GmbH |
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29 / 129 page ![]() Data Sheet BMA423 Page 29 BST-BMA423-DS000-00 | Version 1.0 | August 2017 Bosch Sensortec © Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany. Note: Specifications within this document are subject to change without notice. Sample drop frames will be inserted only for transition phases after configuration changes, not for samples dropped between sensor enable and first valid sample. For a detailed description of configuration changes see Section 4.4, Subsection “Configuration Changes”. FIFO Partial frame reads When a frame is only partially read through the Register FIFO_DATA it will be repeated completely with the next access both in headerless and in header mode. In headermode, this includes the header. In the case of a FIFO overflow between the first partial read and the second read attempt, the frame may be deleted. FIFO overreads When more data are read from the FIFO than it contains valid data, 0x8000 is returned in headerless mode. In header mode 0x80 indicates an invalid frame. FIFO data synchronization All sensor data are sampled with respect to a common ODR time grid. Even if a different ODR is selected for the acceleration and the magnetic sensor the data remains synchronized: If a frame contains a sample from a sensor element with ODR x, then it must contain also samples of all sensor elements with an ODR y>=x. This applies for steady state operation. In transition phases, it is more important not to lose data, therefore exceptions are possible if the sensor elements with ODR y>=x do not have data, e.g. due to a sensor configuration change. FIFO Data Synchronization Scheme in the following figure illustrates the steady state and transient operating conditions. ACC MAG t ACC MAG t 1/ODR_ACC 1/ODR_MAG ACC MAG t ACC enabled ACC start-up time Frame inconsistency accepted during transition phases MAG start-up time MAG enabled Steady state operation |
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