ASX340 datasheet(15/78 Pages) ETC2

15 / 78 page

PDF: 171981479/Source: 8304342517

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ASX340/MT9V139_DS Rev. C Pub. 3/11 EN

ASX340/MT9V139: 1/4-Inch Color CMOS NTSC/PAL Digital Image Sensor

Pin Descriptions and Assignments

Aptina Confidential and Proprietary

Preliminary

Notes:

1. The reason for defining the default state as logic 0 rather than high impedance is this: when wired in a

system (for example, on our demo boards), these outputs will be connected, and the inputs to which

they are connected will want to see a valid logic level. No current drain should result from driving these

to a valid logic level (unless there is a pull-up at the system level).

2. These pads have their input circuitry powered down, but they are not output-enabled. Therefore, they

can be left floating but they will not drive a valid logic level to an attached device.

DOUT_LSB1

High impedance

Input/Output. This interface disabled by default.

Input buffers (used for GPIO function) powered

down by default, so these pins can be left

unconnected (floating). After reset, these pins

are powered-up, sampled, then powered down

again as part of the auto-configuration

mechanism.

DOUT_LSB0

High impedance

HIgh impedance

DAC_POS

High impedance

Driven

Output. Interface disabled by hardware reset

and enabled by default when the device starts

streaming.

DAC_NEG

DAC_REF

TDI

Internal pull-up enabled

Input. Internal pull-up means that this pin can

be left unconnected (floating).

TDO

High impedance

Output. Driven only during appropriate parts of

the JTAG shifter sequence.

TMS

Internal pull-up enabled

Input. Internal pull-up means that this pin can

be left unconnected (floating).

TCK

Internal pull-up enabled

Input. Internal pull-up means that this pin can

be left unconnected (floating).

TRST_N

N/A

Input. Must always be driven to a valid logic

level. Must be driven to GND for normal

operation.

FRAME_SYNC

N/A

Input. Must always be driven to a valid logic

level. Must be driven to GND for normal

operation.

GPIO12

High impedance

Input/Output. This interface disabled by default.

Input buffers (used for GPIO function) powered

down by default, so these pins can be left

unconnected (floating). After reset, these pins

are powered-up, sampled, then powered down

again as part of the auto-configuration

mechanism.

GPIO13

High impedance

Input/Output. This interface disabled by default.

Input buffers (used for GPIO function) powered

down by default, so these pins can be left

unconnected (floating). After reset, these pins

are powered-up, sampled, then powered down

again as part of the auto-configuration

mechanism.

ATEST1

N/A

Must be driven to GND for normal operation.

ATEST2

N/A

Must be driven to GND for normal operation.

Table 6:

Reset/Default State of Interfaces (continued)

Name

Reset State

Default State

Notes

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