STC15F101 datasheet(36/252 Pages) ETC2

36 / 252 page

Some SFRs related to Low voltage detection as shown below.

PCON register (Power Control Register)

LSB

SFR name Address

bit

PCON

87H

name

LVDF

POF

GF1

GF0

IDL

LVDF

: Low-Voltage Flag. Once low voltage condition is detected (VCC power is lower than LVD

voltage), it is set by hardware (and should be cleared by software).

POF

: Power-On flag. It is set by power-off-on action and can only cleared by software.

GF1

: General-purposed flag 1

GF0

: General-purposed flag 0

: Power-Down bit.

IDL

: Idle mode bit.

IE: Interrupt Enable Rsgister (Address: 0A8H)

ELVD EADC

ET1

EX1

ET0

EX0

(MSB)

(LSB)

Enable Bit = 1 enables the interrupt .

Enable Bit = 0 disables it .

EA (IE.7):

disables all interrupts. if EA = 0,no interrupt will be acknowledged. if

EA = 1, each interrupt source is individually enabled or disabled by

setting or clearing its enable bit.

ELVD (IE.6):

Low volatge detection interrupt enable bit.

IP: Interrupt Priority Register (Address: 0B8H)

PLVD PADC

PT1

PX1

PT0

PX0

(MSB)

(LSB)

Priority bit = 1 assigns high priority .

Priority bit = 0 assigns low priority.

PLVD (IP.6):

Low voltage detection interrupt priority.

STC15F101 Datasheet(PDF) 36 Page - List of Unclassifed Manufacturers

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