LD7830GS datasheet(9/18 Pages) LEADTREND

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LD7830

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD7830-DS-01a

August 2012

Application Information

Operation Overview

The LD7830 is an excellent single-stage Flyback PFC

controller for LED lighting applications. It integrates more

functions to reduce the external components counts and

the size. Its major features are described as below.

The LD7830 is a voltage-mode TM PFC controller. The

turn-on time of the switch is fixed while the turn-off time is

varied in steady state. Therefore, the switching frequency

varies in accordance with the input voltage variation. The

LD7830 features over load protection, over voltage

protection, over current protection, under voltage lockout

and LEB of the current sensing. Also, the LD7830

requires no mains voltage sensing unlike what the other

traditional current mode PFC controllers behave for

power saving.

Internal High-Voltage Startup Circuit and

Under Voltage Lockout (UVLO)

The traditional circuit provides the startup current through

a startup resistor to power up the PWM controller.

However, it consumes significant power to meet the

power saving requirement. In most cases, startup

resistors carry large resistance. And, a larger resistor will

spend more time to start up.

To achieve optimized topology, as shown in Fig. 13,

LD7830 is implemented with a high-voltage startup circuit

to enhance it. During startup, a high-voltage current

source sinks current from the full-bridge rectifier to

provide the startup current and charge Vcc capacitor C1

at the same time.

On condition of VCC below PDR, the

charge current will remain at 1.3mA to protect the circuit

from being damaged, even in case VCC pin is shorted to

ground. In contrast, the charge current will increases to

3.1mA once VCC rises above PDR voltage threshold

during start up. Meanwhile, it consumes only 75

A for

Vcc supply current, that most of the HV current is

reserved to charge the Vcc capacitor. In using such

configuration, the turn-on delay time will be almost no

difference either in low-line or high-line conditions.

Once the Vcc voltage rises higher than UVLO(on) to

power on the LD7830 and further to deliver the gate drive

signal, the high-voltage current source will be disabled

and the supply current is provided from the auxiliary

winding of the transformer.

Therefore, it would eliminate

the power loss on the startup circuit and perform highly

power saving.

An UVLO comparator is embedded to detect the voltage

on the Vcc pin to ensure the supply voltage enough to

power on the LD7830 PWM controller and in addition to

drive the power MOSFET.

As shown in Fig. 14, a

hysteresis is provided to prevent the shutdown from the

voltage dip during startup.

EMI

Filter

OUT

VCC

GND

LD7830

input

Fig. 13

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