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ES8388 Datasheet(PDF) 21 Page - Suzhou Everest Semiconductor Co. Ltd. |
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ES8388 Datasheet(HTML) 21 Page - Suzhou Everest Semiconductor Co. Ltd. |
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21 / 36 page ![]() Everest Semiconductor ES8388 Revision 5.0 July 2018 Latest datasheet: www.everest-semi.com or info@everest-semi.com 21 0001 – -15 dB 0010 – -13.5 dB …… 0111 – -6 dB 1000 – -4.5 dB 1001 – -3 dB 1010-1111 – -1.5 dB ALCHLD 3:0 ALC hold time before gain is increased 0000 – 0ms 0001 – 2.67ms 0010 – 5.33ms …… (time doubles with every step) 1001 – 0.68s 1010 or higher – 1.36s 6.2.12 Register 20 – ADC Control 12, Default 0011 0010 Bit Name Bit Description ALCDCY 7:4 ALC decay (gain ramp up) time, ALC mode/limiter mode: 0000 – 410 us/90.8 us 0001 – 820 us/182us 0010 – 1.64 ms/363us …… (time doubles with every step) 1001 – 210 ms/46.5 ms 1010 or higher – 420 ms/93 ms ALCATK 3:0 ALC attack (gain ramp down) time, ALC mode/limiter mode: 0000 – 104 us/22.7 us 0001 – 208 us/45.4 us 0010 – 416 us/90.8 us …… (time doubles with very step) 1001 – 53.2 ms/11.6 ms 1010 or higher – 106 ms/23.2 ms |
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