
AT2008
8 Channels ADPCM Processor
Page 13 of 19
©2001 Atelic Systems, Inc.
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u-Law input, 32k ADPCM algorithm.
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Input time slot: @xin[32:39]
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Output time slot: @xout[32:35]
Channel 7: (encode ADPCM channel)
MCU7byte Command:
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Encode (i.e. output is ADPCM sample sequence)
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u-Law input, 32k ADPCM algorithm.
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Input time slot: @xin[48:55]
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Output time slot: @xout[48:51]
The following is command sequences of per channel control and mcu7byte:
Command bytes specifying per channel control
30
// Begin per channel control. This byte is fixed.
00 // begin at 0 channel. This byte is usually fixed (usually begin specifying at 0).
00
// 0 channel high byte.
00
// 0 channel low byte.
00
// 1 channel high byte.
00
// 1 channel low byte.
00
// 2 channel high byte.
00
// 2 channel low byte.
00
// 3 channel high byte.
00
// 3 channel low byte.
00
// 4 channel high byte.
00
// 4 channel low byte.
00
// 5 channel high byte.
00
// 5 channel low byte.
00
// 6 channel high byte.
00
// 6 channel low byte.
00 // 7 channel high byte.
00
// 7 channel low byte.
Command bytes specifying mcu7byte definition.
00
// begin mcu7byte definition.
D0 // [7]: input; [6]:output; 0==X; 1==Y, channel 0, yin-yout
5E
// Algorithm Setup, default value = 5EH for expand
00
//
00
// Begin input slot bit, ADPCM
03
// End input slot bit, ADPCM
00
// Begin output slot bit, PCM
07
// End output slot bit, PCM
D0
// [7]: input; [6]:output; 0==X; 1==Y, channel 1, yin-yout
5E
// Algorithm Setup, default value = 5EH for expand
00
//
10
// Begin input slot bit, ADPCM
13
// End input slot bit, ADPCM
10
// Begin output slot bit, PCM
17
// End output slot bit, PCM
D0
// [7]: input; [6]:output; 0==X; 1==Y, channel 2, yin-yout