¡ Semiconductor

MSM6786

6/17

FEDL6786-03

Switching Characteristics

LOAD

HiZ

HiZ

CLOCK

DATA I/O

(During input mode)

(The charging and discharging time during high impedance depends on trace resistance and stray capacitance.)

Parameter

Symbol

Condition

Min.

Max.

Unit

Clock Frequency

Clock Pulse Width

Rise/Fall Time

Data Setup Time

Data Hold Time

Load Pulse Width

ClockÆLoad Time

LoadÆClock Time

Output Delay Time 1

Output Delay Time 2

—

—

MHz

—

—

—

200

—

100

100

200

100

200

—

—

2.0

—

50

—

—

—

—

—

300

300

ns

ns

ns

ns

ns

ns

ns

ns

ns

—

—

—

—

—