10

TP1561A/ TP1561NA/TP1562A/TP1564A

Stable 6MHz, 500μA, RRIO, Precision Op Amps

Rev. B.03

www.3peakic.com.cn

10KOhm

5pF

10KOhm

CPAR

Vin

Vout

Figure 2

Shut-down

The single channel OPA versions have SHDN pins that can shut down the amplifier to less than 0.2 μA supply

current. The SHDN pin voltage needs to be within 0.5 V of V– for the amplifier to shut down. During shutdown, the

output will be in high output resistance state, which is suitable for multiplexer applications. When left floating, the

SHDN pin is internally pulled up to the positive supply and the amplifier remains enabled.

Driving Large Capacitive Load

The TP156xA family of OPA is designed to drive large capacitive loads. Refer to Typical Performance

Characteristics for “Phase Margin vs. Load Capacitance”. As always, larger load capacitance decreases overall

phase margin in a feedback system where internal frequency compensation is utilized. As the load capacitance

increases, the feedback loop‟s phase margin decreases, and the closed-loop bandwidth is reduced. This

produces gain peaking in the frequency response, with overshoot and ringing in output step response. The

unity-gain buffer (G = +1V/V) is the most sensitive to large capacitive loads.

When driving large capacitive loads with the TP156xA OPA family (e.g., > 200 pF when G = +1V/V), a small

the output load resistive at higher frequencies.

Vin

Vout

Cload

Riso

Figure 3

Power Supply Layout and Bypass

to 0.1 μF) within 2 mm for good high frequency performance. It can also use a bulk capacitor (i.e., 1μF or larger)

within 100mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts.

Ground layout improves performance by decreasing the amount of stray capacitance and noise at the OPA‟s

inputs and outputs. To decrease stray capacitance, minimize PC board lengths and resistor leads, and place

external components as close to the op amps‟ pins as possible.

Proper Board Layout

To ensure optimum performance at the PCB level, care must be taken in the design of the board layout. To avoid

leakage currents, the surface of the board should be kept clean and free of moisture. Coating the surface creates

a barrier to moisture accumulation and helps reduce parasitic resistance on the board.

Keeping supply traces short and properly bypassing the power supplies minimizes power supply disturbances

due to output current variation, such as when driving an ac signal into a heavy load. Bypass capacitors should be