12

Rev. A04

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TP2311 / TP2312 / TP2314

10MHz Bandwidth, Low Noise Precision Op-amps

In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be

considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity

Ω. A 5V difference would cause 5pA of current to flow,

which is greater than the TP2311/2312/2314

OPA’s input bias current at +27°C (±3pA, typical). It is recommended to

use multi-layer PCB layout and route

the OPA’s -IN and +IN signal under the PCB surface.

The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is

biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 1 for Inverting

Gain application.

1. For Non-Inverting Gain and Unity-Gain Buffer:

–). This biases the guard ring to the Common Mode input voltage.

2. For Inverting Gain and Trans-impedance Gain Amplifiers (convert current to voltage, such as photo detectors):

–) to the input with a wire that does not touch the PCB surface.

Guard Ring

Figure 5 The Layout of Guard Ring

Power Supply Layout and Bypass

The TP2311/2312/2312

0.01μF to 0.1μF) within 2mm for good high frequency performance. It can also use a bulk capacitor (i.e., 1μF or larger)

within 100mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts.

Ground layout improves performance by decreasing the amount of stray capacitance and noise at the OPA’s inputs

and outputs. To decrease stray capacitance, minimize PC board lengths and resistor leads, and place external

components as close to the op amps’ pins as possible.

Proper Board Layout

To ensure optimum performance at the PCB level, care must be taken in the design of the board layout. To avoid

leakage currents, the surface of the board should be kept clean and free of moisture. Coating the surface creates a

barrier to moisture accumulation and helps reduce parasitic resistance on the board.

Keeping supply traces short and properly bypassing the power supplies minimizes power supply disturbances due to

output current variation, such as when driving an ac signal into a heavy load. Bypass capacitors should be connected

as closely as possible to the device supply pins. Stray capacitances are a concern at the outputs and the inputs of the

amplifier. It is recommended that signal traces be kept at least 5mm from supply lines to minimize coupling.