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TLV75801PDBVT Datasheet(PDF) 3 Page - Texas Instruments |
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TLV75801PDBVT Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 35 page ![]() 1 IN 2 GND 3 EN 4 FB 5 OUT Not to scale 1 OUT 6 IN 2 FB 5 DNC 3 GND 4 EN Not to scale Thermal pad 3 TLV758P www.ti.com SBVS351C – APRIL 2018 – REVISED MARCH 2019 Product Folder Links: TLV758P Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated 5 Pin Configuration and Functions DRV Package 6-Pin Adjustable WSON Top View DBV Package (Preview) 5-Pin Adjustable SOT-23 Top View Pin Functions PIN I/O DESCRIPTION NAME DRV DBV DNC 5 — — Do not connect EN 4 3 Input Enable pin. Drive EN greater than VEN(HI) to turn on the regulator. Drive EN less than VEN(LO) to put the LDO into shutdown mode. FB 2 4 — This pin is used as an input to the control loop error amplifier and is used to set the output voltage of the LDO. GND 3 2 — Ground pin IN 6 1 Input Input pin. For best transient response and to minimize input impedance, use the recommended value or larger ceramic capacitor from IN to ground as listed in the Recommended Operating Conditions table and the Input and Output Capacitor Selection section. Place the input capacitor as close to the output of the device as possible. OUT 1 5 Output Regulated output voltage pin. A capacitor is required from OUT to ground for stability. For best transient response, use the nominal recommended value or larger ceramic capacitor from OUT to ground; see the Recommended Operating Conditions table and the Input and Output Capacitor Selection section. Place the output capacitor as close to output of the device as possible. Thermal pad Pad — — Connect the thermal pad to a large area GND plane for improved thermal performance. |
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