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Since the generated noise is mainly due to the switching activity of the VRM, noise emissions depend on

how fast the current switch. To reduce noise emission levels, it is also possible, in addition to the previous

guidelines, to reduce the current slope and then to increase the switching times: this will cause, as a con-

sequence of the higher switching time, an increase in switching losses that must be considered in the ther-

mal design of the system.

Figure 19. - Layout Suggestions (not in scale).

Application Board Description

The application board shows the operation of the device in a dual phase application. This evaluation board

allows output voltage adjustability (0.8375V - 1.6000V) through the switches S0-S4 and high output cur-

rent capability.

in order to give maximum flexibility in the mosfet choice.

The four layers demo board's copper thickness is of 70

µm in order to minimize conduction losses consid-

ering the high current that the circuit is able to deliver.

Demo board schematic circuit is reported in Figure 20.

Several jumpers allow setting different configurations for the device: JP3, JP4 and JP5 allow configuring

the remote buffer as desired. Simply shorting JP4 and JP5 the remote buffer is enabled and it senses the

output voltage on-board; to implement a real remote sense, leave these jumpers open and connect the

FBG and FBR connectors on the demo board to the remote load.

To avoid using the remote buffer, simply short all the jumpers JP3, JP4 and JP5. Local sense through the

R7 is used for the regulation.

The input can be configured in different ways using the jumpers JP1, JP2 and JP6; these jumpers control

also the mosfet driver supply voltage. Anyway, power conversion starts from VIN and the device is sup-

ATX 12 CONNECTOR

INPUT POWER PLANE

PHASE PLANE

PHASE PLANE

OUTPUT

POWER PLANE

OUTPUT BULK

CAPACITORS

INPUT CAPS

CERAMIC

DECOUPLING

CAPACITORS

NTC FOR

THERMAL

COMPENSATION

SAFELY FAR

HIGH SPEED

DATA BUS