82801E datasheet(27/84 Pages) INTEL

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Intel® 82801E C-ICH

Advance Information Datasheet

FERR#

Numeric Coprocessor Error: This signal is tied to the coprocessor error

signal on the processor. FERR# is only used if the 82801E C-ICH

coprocessor error reporting function is enabled in the General Control

82801E C-ICH generates an internal IRQ13 to its interrupt controller unit. It is

also used to gate the IGNNE# signal to ensure that IGNNE# is not asserted to

the processor unless FERR# is active. FERR# requires an external weak

pull-up to ensure a high level when the coprocessor error function is disabled.

FRAME#

I/O

Cycle Frame: The current Initiator asserts FRAME# to indicate the beginning

and duration of a PCI transaction. While the initiator asserts FRAME#, data

transfers continue. When the initiator deasserts FRAME#, the transaction is in

the final data phase. FRAME# is an input to the 82801E C-ICH when the

82801E C-ICH is the target, and FRAME# is an output from the 82801E

C-ICH when the 82801E C-ICH is the Initiator. FRAME# remains tri-stated by

the 82801E C-ICH until driven by an Initiator.

FWH[3:0]

/LAD[3:0]

I/O

Firmware Hub Signals: These signals are muxed with LPC address signals.

FWH[4]

/LFRAME#

I/O

Firmware Hub Signals: This signal is muxed with the LPC LFRAME# signal.

GNT[3:0]#

GNT[5]#

/GNT[B]#

/GPIO[17]#

PCI Grants: The 82801E C-ICH supports up to four masters on the PCI bus.

GNT[5]# is muxed with PC/PCI GNT[B]# (must choose one or the other, but

not both). If not needed for PCI or PC/PCI, GNT[5]# can instead be used as a

GPIO.

Pull-up resistors are not required on these signals. If pullups are used, they

should be tied to the Vcc3_3 power rail. GNT[B]#/GNT[5]#/GPIO[17] has an

internal pull-up.

GNT[A]#

/GPIO[16]

/GNT[B]#

/GNT[5]#

/GPIO[17]

PC/PCI DMA Acknowledges [A:B]: This grant serializes an ISA-like DACK#

for the purpose of running DMA/ISA master cycles over the PCI bus. This is

used by devices such as PCI-based Super I/O or audio codecs which need to

perform legacy 8237 DMA but have no ISA bus.

When not used for PC/PCI, these signals can be used as General Purpose

Outputs. GNTB# can also be used as the fourth PCI bus master grant output.

These signal have internal pull-up resistors.

GPIO[1:0]

Fixed as Input only. Main Power Well. Can instead be used for PC/PCI

REQ[A:B]#. GPIO[1] can also alternatively be used for PCI REQ[5]#.

GPIO[3:2]

Not implemented.

GPIO[5:4]

Fixed as Input only. Main power well. Can be used instead as PIRQ[G:H]#.

GPIO[6]

Fixed as Input only. Main power well.

GPIO[7]

Fixed as Input only. Main power well. Not muxed.

GPIO[8]

Fixed as Input only. Main power well. Not muxed.

GPIO[10:9]

Not implemented.

GPIO[11]

Fixed as Input only. Main power well. Can instead be used for SMBALERT#.

GPIO[13:12]

Fixed as Input only. Main power well. Not muxed.

GPIO[15:14]

Not implemented.

GPIO[17:16]

Fixed as Output only. Main Power Well. Can instead be used for PC/PCI

GNT[A:B]#. GPIO[17] can also alternatively be used for PCI GNT[5]#.

Integrated pull-up resistor.

GPIO[20:18]

Fixed as Output only. Main power well.

GPIO[21]

Fixed as Output only. Main power well.

GPIO[22]

Fixed as Output only. Main power well. Open-drain output.

GPIO[23]

Fixed as Output only. Main power well.

Table 6.

82801E C-ICH Signal Description (Sheet 3 of 11)

Signal

Type

Description

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