NCP5008, NCP5009

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4

Table 1. Shift Register Bits Assignment and Functions

SetReg shift register (Note: The register content is latched upon CS positive going).

B7

B6

B5

B4

B3

B2

B1

Bn Value

After POR

0

0

0

0

0

0

0

Iout Peak (mA)

LOCAL

CLOCK

CS

B1−B7

Output Current

L

X

H

X

0

L

X

L

X

H or Open

X

H

No Change

H or Open

↓

L

No Change

H or Open

↑

L

The register is clear to zero during the first 20 ns following the CS falling edge.

Note:

Coefficient Value (internal ratio): k = 746

Maximum output peak current @ B7 = 1 and Iphoto = 0

Iref +

Vref

R1

+ 1.24 V

R1