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AM5728 Datasheet(PDF) 150 Page - Texas Instruments

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Part # AM5728
Description  Sitara Processors Silicon Revision 2.0
PDF  415 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM5728 Datasheet(HTML) 150 Page - Texas Instruments

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AM5729, AM5728, AM5726
SPRS953F – DECEMBER 2015 – REVISED MAY 2019
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM5729 AM5728 AM5726
Terminal Configuration and Functions
Copyright © 2015–2019, Texas Instruments Incorporated
4.4.25 System and Miscellaneous
4.4.25.1 Sysboot
NOTE
For more information, see the Initialization (ROM Code) section of the device TRM.
Table 4-28. Sysboot Signal Descriptions
SIGNAL NAME
DESCRIPTION
TYPE
BALL
sysboot0
Boot Mode Configuration 0. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
M6
sysboot1
Boot Mode Configuration 1. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
M2
sysboot2
Boot Mode Configuration 2. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
L5
sysboot3
Boot Mode Configuration 3. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
M1
sysboot4
Boot Mode Configuration 4. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
L6
sysboot5
Boot Mode Configuration 5. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
L4
sysboot6
Boot Mode Configuration 6. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
L3
sysboot7
Boot Mode Configuration 7. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
L2
sysboot8
Boot Mode Configuration 8. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
L1
sysboot9
Boot Mode Configuration 9. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
K2
sysboot10
Boot Mode Configuration 10. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
J1
sysboot11
Boot Mode Configuration 11. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
J2
sysboot12
Boot Mode Configuration 12. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
H1
sysboot13
Boot Mode Configuration 13. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
J3
sysboot14
Boot Mode Configuration 14. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
H2
sysboot15
Boot Mode Configuration 15. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
I
H3
4.4.25.2 Power, Reset and Clock Management (PRCM)
NOTE
For more information, see PRCM section of the device TRM.
Table 4-29. PRCM Signal Descriptions
SIGNAL NAME
DESCRIPTION
TYPE
BALL
clkout1
Device Clock output 1. Can be used externally for devices with non-critical
timing requirements, or for debug, or as a reference clock on GPMC as
described in Table 7-26 GPMC/NOR Flash Interface Switching Characteristics -
Synchronous Mode - Default and Table 7-28 GPMC/NOR Flash Interface
Switching Characteristics - Synchronous Mode - Alternate.
O
F21/ P7



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