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AM5728 Datasheet(PDF) 241 Page - Texas Instruments

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Part # AM5728
Description  Sitara Processors Silicon Revision 2.0
PDF  415 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM5728 Datasheet(HTML) 241 Page - Texas Instruments

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Copyright © 2015–2019, Texas Instruments Incorporated
Timing Requirements and Switching Characteristics
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Product Folder Links: AM5729 AM5728 AM5726
241
AM5729, AM5728, AM5726
www.ti.com
SPRS953F – DECEMBER 2015 – REVISED MAY 2019
Manual IO Timings Modes must be used to ensure some IO timings for VOUT2. See Table 7-2 Modes Summary for a list of IO timings requiring
the use of Manual IO Timings Modes. See Table 7-22 Manual Functions Mapping for DSS VOUT2 for a definition of the Manual modes.
Table 7-22 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in the CFG_x registers.
Table 7-22. Manual Functions Mapping for DSS VOUT2 IOSET1
BAL
L
BALL NAME
VOUT2_IOSET1_MANUAL
1
VOUT2_IOSET1_MANUAL
2
VOUT2_IOSET1_MANUAL
3
VOUT2_IOSET1_MANUAL
4
CFG REGISTER
MUXMODE
A_DELAY
(ps)
G_DELAY
(ps)
A_DELAY
(ps)
G_DELAY
(ps)
A_DELAY
(ps)
G_DELAY
(ps)
A_DELAY
(ps)
G_DELAY
(ps)
4
E1
vin2a_clk0
2718
0
819
0
3794
0
4664
0
CFG_VIN2A_CLK0_OUT
vout2_fld
F2
vin2a_d0
2680
0
485
296
3757
0
4627
0
CFG_VIN2A_D0_OUT
vout2_d23
F3
vin2a_d1
2633
0
733
0
3710
0
4580
0
CFG_VIN2A_D1_OUT
vout2_d22
D3
vin2a_d10
1867
0
0
0
2954
0
3824
0
CFG_VIN2A_D10_OUT
vout2_d13
F6
vin2a_d11
2457
0
431
127
3534
0
4404
0
CFG_VIN2A_D11_OUT
vout2_d12
D5
vin2a_d12
2683
1016
1286
514
3628
648
4498
648
CFG_VIN2A_D12_OUT
vout2_d11
C2
vin2a_d13
2629
985
1229
486
3569
622
4439
622
CFG_VIN2A_D13_OUT
vout2_d10
C3
vin2a_d14
2531
804
1126
309
3460
452
4530
452
CFG_VIN2A_D14_OUT
vout2_d9
C4
vin2a_d15
2624
818
1227
315
3567
452
4537
452
CFG_VIN2A_D15_OUT
vout2_d8
B2
vin2a_d16
2747
767
1357
256
3704
386
4574
386
CFG_VIN2A_D16_OUT
vout2_d7
D6
vin2a_d17
2622
841
1226
337
3616
474
4686
474
CFG_VIN2A_D17_OUT
vout2_d6
C5
vin2a_d18
2328
0
430
0
3406
0
4276
0
CFG_VIN2A_D18_OUT
vout2_d5
A3
vin2a_d19
2300
0
401
0
3427
0
4197
0
CFG_VIN2A_D19_OUT
vout2_d4
D1
vin2a_d2
2452
0
446
106
3528
0
4398
0
CFG_VIN2A_D2_OUT
vout2_d21
B3
vin2a_d20
1998
0
98
0
3075
0
3845
0
CFG_VIN2A_D20_OUT
vout2_d3
B4
vin2a_d21
1953
0
54
0
3030
0
3900
0
CFG_VIN2A_D21_OUT
vout2_d2
B5
vin2a_d22
1893
0
0
0
3030
0
3900
0
CFG_VIN2A_D22_OUT
vout2_d1
A4
vin2a_d23
1936
0
36
0
3013
0
3883
0
CFG_VIN2A_D23_OUT
vout2_d0
E2
vin2a_d3
2494
0
595
0
3571
0
4441
0
CFG_VIN2A_D3_OUT
vout2_d20
D2
vin2a_d4
3001
153
1254
0
4231
0
4901
0
CFG_VIN2A_D4_OUT
vout2_d19
F4
vin2a_d5
2463
0
563
0
3539
0
4409
0
CFG_VIN2A_D5_OUT
vout2_d18
C1
vin2a_d6
2456
0
558
0
3334
0
4404
0
CFG_VIN2A_D6_OUT
vout2_d17
E4
vin2a_d7
2431
0
532
0
3509
0
4379
0
CFG_VIN2A_D7_OUT
vout2_d16
F5
vin2a_d8
2262
0
363
0
3340
0
4210
0
CFG_VIN2A_D8_OUT
vout2_d15
E6
vin2a_d9
2145
0
246
0
3222
0
4092
0
CFG_VIN2A_D9_OUT
vout2_d14
G2
vin2a_de0
2597
0
550
149
3675
0
4545
0
CFG_VIN2A_DE0_OUT
vout2_de
H7
vin2a_fld0
0
957
1208
969
0
686
0
686
CFG_VIN2A_FLD0_OUT
vout2_clk



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