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AM5728 Datasheet(PDF) 268 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 268 Page - Texas Instruments |
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268 / 415 page ![]() 268 AM5729, AM5728, AM5726 SPRS953F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-33. Virtual Functions Mapping for GPMC (continued) BALL NUMBE R BALL NAME Delay Mode Value MUXMODE[15:0] GPMC_VIRTUAL 1 0 1 2 3 5 6 J4 gpmc_a24 11 gpmc_a24 gpmc_a18 J6 gpmc_a25 11 gpmc_a25 gpmc_a19 H4 gpmc_a26 11 gpmc_a26 gpmc_a20 H5 gpmc_a27 11 gpmc_a27 gpmc_a21 H6 gpmc_cs1 11 gpmc_cs1 gpmc_a22 T1 gpmc_cs0 14 gpmc_cs0 P2 gpmc_cs2 12 gpmc_cs2 P1 gpmc_cs3 10 gpmc_cs3 gpmc_a1 P7 gpmc_clk 12 gpmc_clk gpmc_cs7 gpmc_wait1 N1 gpmc_advn_ale 13 gpmc_advn_ale gpmc_cs6 gpmc_wait1 gpmc_a2 gpmc_a23 M5 gpmc_oen_ren 14 gpmc_oen_ren M3 gpmc_wen 14 gpmc_wen N6 gpmc_ben0 11 gpmc_ben0 gpmc_cs4 M4 gpmc_ben1 11 gpmc_ben1 gpmc_cs5 gpmc_a3 N2 gpmc_wait0 14 gpmc_wait0 AG5 vin1a_d11 9 gpmc_a23 AF2 vin1a_d12 9 gpmc_a24 AF6 vin1a_d13 9 gpmc_a25 AF3 vin1a_d14 9 gpmc_a26 AF4 vin1a_d15 9 gpmc_a27 7.11 Timers The device has 16 general-purpose (GP) timers (TIMER1 - TIMER16), two watchdog timers, and a 32-kHz synchronized timer (COUNTER_32K) that have the following features: • Dedicated input trigger for capture mode and dedicated output trigger/pulse width modulation (PWM) signal • Interrupts generated on overflow, compare, and capture • Free-running 32-bit upward counter • Supported modes: – Compare and capture modes – Auto-reload mode – Start-stop mode • On-the-fly read/write register (while counting) The device has two system watchdog timer (WD_TIMER1 and WD_TIMER2) that have the following features: • Free-running 32-bit upward counter • On-the-fly read/write register (while counting) • Reset upon occurrence of a timer overflow condition The device includes one instance of the 32-bit watchdog timer: WD_TIMER2, also called the MPU watchdog timer. The watchdog timer is used to provide a recovery mechanism for the device in the event of a fault condition, such as a non-exiting code loop. |
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