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AM5728 Datasheet(PDF) 288 Page - Texas Instruments

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Part # AM5728
Description  Sitara Processors Silicon Revision 2.0
PDF  415 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM5728 Datasheet(HTML) 288 Page - Texas Instruments

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AM5729, AM5728, AM5726
SPRS953F – DECEMBER 2015 – REVISED MAY 2019
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM5729 AM5728 AM5726
Timing Requirements and Switching Characteristics
Copyright © 2015–2019, Texas Instruments Incorporated
Table 7-50. Timing Requirements for McASP2 (1) (continued)
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
6
th(ACLK-AFSRX)
Hold time, AFSR/X input valid after ACLKR/X
ACLKR/X int
-1
ns
ACLKR/X ext in
ACLKR/X ext out
3.2
ns
ACLKR/X ext in
ACLKR/X ext out "80M" Virtual
IO Timing Modes
3
ns
7
tsu(AXR-ACLK)
Setup time, AXR input valid before ACLKR/X
ACLKR/X int
21.4
ns
ACLKR/X ext in
ACLKR/X ext out
3.9
ns
ACLKR/X ext in
ACLKR/X ext out "80M" Virtual
IO Timing Modes
3
ns
8
th(ACLK-AXR)
Hold time, AXR input valid after ACLKR/X
ACLKR/X int
-1
ns
ACLKR/X ext in
ACLKR/X ext out
3.2
ns
ACLKR/X ext in
ACLKR/X ext out "80M" Virtual
IO Timing Modes
3
ns
(1) ACLKR internal: ACLKRCTL.CLKRM=1, PDIR.ACLKR = 1
ACLKR external input: ACLKRCTL.CLKRM=0, PDIR.ACLKR=0
ACLKR external output: ACLKRCTL.CLKRM=0, PDIR.ACLKR=1
ACLKX internal: ACLKXCTL.CLKXM=1, PDIR.ACLKX = 1
ACLKX external input: ACLKXCTL.CLKXM=0, PDIR.ACLKX=0
ACLKX external output: ACLKXCTL.CLKXM=0, PDIR.ACLKX=1
(2) P = AHCLKR/X period in ns.
(3) R = ACLKR/X period in ns.
Table 7-51. Timing Requirements for McASP3/4/5/6/7/8 (1)
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
1
tc(AHCLKRX)
Cycle time, AHCLKR/X
20
ns
2
tw(AHCLKRX)
Pulse duration, AHCLKR/X high or low
0.35P
(2)
ns
3
tc(ACLKRX)
Cycle time, ACLKR/X
20
ns
4
tw(ACLKRX)
Pulse duration, ACLKR/X high or low
0.5R - 3
(3)
ns
5
tsu(AFSRX-ACLK)
Setup time, AFSR/X input valid before ACLKR/X
ACLKR/X int
20.2
ns
ACLKR/X ext in
ACLKR/X ext out
4.9
ns
6
th(ACLK-AFSRX)
Hold time, AFSR/X input valid after ACLKR/X
ACLKR/X int
-1
ns
ACLKR/X ext in
ACLKR/X ext out
2.26
ns
tsu(AXR-ACLK)
Setup time, AXR input valid before ACLKX
ACLKX int
(ASYNC=0)
20.8
ns
ACLKR/X ext in
ACLKR/X ext out
5.75
ns
8
th(ACLK-AXR)
Hold time, AXR input valid after ACLKX
ACLKX int
(ASYNC=0)
-0.9
ns
ACLKR/X ext in
ACLKR/X ext out
2.87
ns
(1) ACLKR internal: ACLKRCTL.CLKRM=1, PDIR.ACLKR = 1 (NOT SUPPORTED)
ACLKR external input: ACLKRCTL.CLKRM=0, PDIR.ACLKR=0
ACLKR external output: ACLKRCTL.CLKRM=0, PDIR.ACLKR=1
ACLKX internal: ACLKXCTL.CLKXM=1, PDIR.ACLKX = 1
ACLKX external input: ACLKXCTL.CLKXM=0, PDIR.ACLKX=0
ACLKX external output: ACLKXCTL.CLKXM=0, PDIR.ACLKX=1
(2) P = AHCLKR/X period in ns.



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