GD25Q16CSFG datasheet(35/68 Pages) GIGADEVICE

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3.3V Uniform Sector

Dual and Quad Serial Flash

GD25Q16C

Lock Bit (LB) in the Status Register can be used to OTP protect the security registers. Once the LB bit is set to 1, the

Security Registers will be permanently locked; the Erase Security Registers command will be ignored.

Address

A23-A16

A15-A8

A7-A0

Security Registers

00H

Don’t Care

Figure 33. Erase Security Registers command Sequence Diagram

7.29. Program Security Registers (42H)

The Program Security Registers command is similar to the Page Program command. Each security register contains

one pages content. A Write Enable (WREN) command must previously have been executed to set the Write Enable Latch

(WEL) bit before sending the Program Security Registers command. The Program Security Registers command is entered

by driving CS# Low, followed by the command code (42H), three address Bytes and at least one data Byte on SI. As soon

as CS# is driven high, the self-timed Program Security Registers cycle (whose duration is tPP) is initiated. While the Program

Security Registers cycle is in progress, the Status Register may be read to check the value of the Write In Progress (WIP)

bit. The Write In Progress (WIP) bit is 1 during the self-timed Program Security Registers cycle, and is 0 when it is completed.

At some unspecified time before the cycle is completed, the Write Enable Latch (WEL) bit is reset.

If the Security Registers Lock Bit (LB) is set to 1, the Security Registers will be permanently locked. Program Security

Registers command will be ignored.

Address

A23-A16

A15-A8

A7-A0

Security Registers 0

00H

Byte Address

Security Registers 1

00H

01H

Byte Address

Security Registers 2

00H

02H

Byte Address

Security Registers 3

00H

03H

Byte Address

Figure34. Program Security Registers command Sequence Diagram

Command

44H

CS#

SCLK

29 30 31

MSB

24 Bits Address

23 22

Command

42H

CS#

SCLK

9 10

28 29 30 31

23 22 21

24-bit address

42 43 44 45

46 47

50 51 52 53

54 55

CS#

SCLK

MSB

Data Byte 2

32 33 34 35

MSB

Data Byte 1

Data Byte 3

Data Byte 256

MSB

36 37 38 39

GD25Q16CSFG Datasheet(PDF) 35 Page - GigaDevice Semiconductor (Beijing) Inc.

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