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GD25VQ16CSFG Datasheet(PDF) 28 Page - GigaDevice Semiconductor (Beijing) Inc.

Part # GD25VQ16CSFG
Description  Uniform Sector Dual and Quad Serial Flash
PDF  59 Pages
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Manufacturer  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Direct Link  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25VQ16CSFG Datasheet(HTML) 28 Page - GigaDevice Semiconductor (Beijing) Inc.

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Uniform Sector
Dual and Quad Serial Flash
GD25VQ16C
28
7.19.
Deep Power-Down (DP) (B9H)
Executing the Deep Power-Down (DP) command is the only way to put the device in the lowest consumption mode
(the Deep Power-Down Mode). It can also be used as an extra software protection mechanism, while the device is not in
active use, since in this mode, the device ignores all Write, Program and Erase commands. Driving CS# high deselects the
device, and puts the device in the Standby Mode (if there is no internal cycle currently in progress). But this mode is not the
Deep Power-Down Mode. The Deep Power-Down Mode can only be entered by executing the Deep Power-Down (DP)
command. Once the device has entered the Deep Power-Down Mode, all commands are ignored except the Release from
Deep Power-Down and Read Device ID (RDI) command. This releases the device from this mode. The Release from Deep
Power-Down and Read Device ID (RDI) command also allows the Device ID of the device to be output on SO.
The Deep Power-Down Mode automatically stops at Power-Down, and the device always Power-Up in the Standby
Mode. The Deep Power-Down (DP) command is entered by driving CS# low, followed by the command code on SI. CS#
must be driven low for the entire duration of the sequence.
The Deep Power-Down command sequence: CS# goes low  sending Deep Power-Down command  CS# goes
high. The command sequence is shown in Figure23. CS# must be driven high after the eighth bit of the command code has
been latched in; otherwise the Deep Power-Down (DP) command is not executed. As soon as CS# is driven high, it requires
a delay of tDP before the supply current is reduced to ICC2 and the Deep Power-Down Mode is entered. Any Deep Power-
Down (DP) command, while an Erase, Program or Write cycle is in progress, is rejected without having any effects on the
cycle that is in progress.
Figure 23. Deep Power-Down Sequence Diagram
7.20.
Release from Deep Power-Down or High Performance Mode and Read
Device ID (RDI) (ABH)
The Release from Power-Down or High Performance Mode / Device ID command is a multi-purpose command. It can be
used to release the device from the Power-Down state or High Performance Mode or obtain the devices electronic
identification (ID) number.
To release the device from the Power-Down state or High Performance Mode, the command is issued by driving the
CS# pin low, shifting the instruction code
“ABH” and driving CS# high as shown in Figure24. Release from Power-Down
will take the time duration of tRES1 (See AC Characteristics) before the device will resume normal operation and other
c omma nd are accepted. The CS# pin must remain high during the tRES1 time duration.
When used only to obtain the Device ID while not in the Power-Down state, the command is initiated by driving the
CS# pin low and shifting the instruction code
“ABH” followed by 3-dummy byte. The Device ID bits are then shifted out on
the falling edge of SCLK with most significant bit (MSB) first as shown in Figure25. The Device ID value is listed in
Manufacturer and Device Identification table. The Device ID can be read continuously. The command is completed by
driving CS# high.
Command
0
1
2
3
4
5
6
7
B9H
CS#
SCLK
SI
tDP
Stand-by mode Deep Power-down mode



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