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ES222 Datasheet(PDF) 13 Page - Cyrustek corporation

Part # ES222
Description  DMM Analog front end/Inrush
PDF  32 Pages
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Manufacturer  CYRUSTEK [Cyrustek corporation]
Direct Link  http://www.cyrustek.com.tw
Logo CYRUSTEK - Cyrustek corporation

ES222 Datasheet(HTML) 13 Page - Cyrustek corporation

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ver. 1.2
16/07/12
13
ES222(9999counts dual)
DMM Analog front end/Inrush
Status flags for measurement mode: ● = function available
Measurement mode
HV_n
ALARM
LDUTY
STA0_n
STA1_n
FIN_n
PMAX
PMIN
V mode
●
●
●
A mode
●
●
●
mV mode
●
●
●
VA dual mode
●
●
●
●
●
●
●
●
mVA dual mode
●
●
●
●
●
●
●
VA quad mode
●
●
●
●
●
●
●
●
mV quad mode
●
●
●
●
●
●
●
Res. mode
●
Cont. mode
●
●
Cap. mode
●
●
Diode mode
●
●
LED mode
●
Hz+% mode
●
●
●
●
●
●
UDP mode
●
●
●
Measurement mode
LF_n
INW/INF
SIGN_n
BTSn
PHWAIT
LOCK
DISC
RPH
V mode
●
●
●
●
A mode
●
●
●
mV mode
●
●
VA dual mode
●
●
●
●
●
●
mVA dual mode
●
●
●
●
VA quad mode
●
●
●
●
●
●
mVA quad mode
●
●
●
●
Res. mode
●
●
Cont. mode
●
Cap. mode
●
●
Diode mode
●
●
LED mode
●
●
Hz+% mode
●
●
UDP mode
●
●
Description of status flags:
HV_1/HV_2: When abnormal voltage applied to ADC1/ADC2, the flag will be set.
ALARM: Status flag will be set when short detection in Cont./Diode mode or larger
capacitance detection or higher frequency indication in Hz mode
DISC: Status flag for capacitor discharging mode
BTS0/BTS1: Multi-level battery voltage indication
LF_1/LF_2: Lower frequency indication for Hz mode of ADC1/ADC2
LDUTY: Low duty indication for Hz + duty mode
STA0_1/STA1_1/STA0_2/STA1_2: divider indication for Hz mode of ADC1/ADC2.
FIN_1/FIN_2: Measurement cycle finished for Hz mode of ADC1/ADC2
PMAX: Indicate the ADC data (D0 or D1) is the output of peak maximum voltage
PMIN: Indicate the ADC data (D0 or D1) is the output of peak minimum voltage
PHWAIT/PHTOUT: Waiting or timeout status indication for 3-phase detection
LOCK/LEAD/LAG: Phase detection status indication for 3-phase detection
RPH: ADC output indication bit for conductance mode
INW/INF: Status flag indication for ACA inrush mode



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