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THCV236 Datasheet(PDF) 24 Page - California Eastern Labs |
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THCV236 Datasheet(HTML) 24 Page - California Eastern Labs |
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24 / 68 page  THCV235_THCV236_Rev.3.40_E Copyright©2016 THine Electronics, Inc. THine Electronics, Inc. 24/68 Security E Data Mapping Table 23. V-by-One ® HS Mode Data Mapping MAINMODE 0 0 0 0 0 0 0 0 0 0 0 0 HFSEL 0 0 0 0 0 0 0 0 1 1 1 1 LFSEL 0 0 0 0 1 1 1 1 0 0 0 0 COL1 0 0 1 1 0 0 1 1 0 0 1 1 COL0 0 1 0 1 0 1 0 1 0 1 0 1 D0 R2 R0 R2 R0 R2 R0 R2 R0 Cb/Cr2 Cb/Cr0 R2 R0 D1 R3 R1 R3 R1 R3 R1 R3 R1 Cb/Cr3 Cb/Cr1 R3 R1 D2 R4 R2 R4 R2 R4 R2 R4 R2 Cb/Cr4 Cb/Cr2 R4 R2 D3 R5 R3 R5 R3 R5 R3 R5 R3 Cb/Cr5 Cb/Cr3 R5 R3 D4 R6 R4 R6 R4 R6 R4 R6 R4 Cb/Cr6 Cb/Cr4 R6 R4 D5 R7 R5 R7 R5 R7 R5 R7 R5 Cb/Cr7 Cb/Cr5 R7 R5 D6 R8 R6 R8 R6 R8 R6 R8 R6 Cb/Cr8 Cb/Cr6 R8 R6 D7 R9 R7 R9 R7 R9 R7 R9 R7 Cb/Cr9 Cb/Cr7 R9 R7 D8 G2 G0 G2 G0 G2 G0 G2 G0 Y2 Y0 G2 G0 D9 G3 G1 G3 G1 G3 G1 G3 G1 Y3 Y1 G3 G1 D10 G4 G2 G4 G2 G4 G2 G4 G2 Y4 Y2 G4 G2 D11 G5 G3 G5 G3 G5 G3 G5 G3 Y5 Y3 G5 G3 D12 G6 G4 G6 G4 G6 G4 G6 G4 Y6 Y4 G6 G4 D13 G7 G5 G7 G5 G7 G5 G7 G5 Y7 Y5 G7 G5 D14 G8 G6 G8 G6 G8 G6 G8 G6 Y8 Y6 G8 G6 D15 G9 G7 G9 G7 G9 G7 G9 G7 Y9 Y7 G9 G7 D16 B2(*1) B0(*1) B2(*1) B0(*1) B2(*1) B0(*1) B2(*1) B0(*1) - - B2 B0 D17 B3(*1) B1(*1) B3(*1) B1(*1) B3(*1) B1(*1) B3(*1) B1(*1) - - B3 B1 D18 B4(*1) B2(*1) B4(*1) B2(*1) B4(*1) B2(*1) B4(*1) B2(*1) - - B4 B2 D19 B5(*1) B3(*1) B5(*1) B3(*1) B5(*1) B3(*1) B5(*1) B3(*1) - - B5 B3 D20 B6(*1) B4(*1) B6(*1) B4(*1) B6(*1) B4(*1) B6(*1) B4(*1) - - B6 B4 D21 B7(*1) B5(*1) B7(*1) B5(*1) B7(*1) B5(*1) B7(*1) B5(*1) - - B7 B5 D22 B8(*1) B6(*1) B8(*1) B6(*1) B8(*1) B6(*1) B8(*1) B6(*1) - - B8 B6 D23 B9(*1) B7(*1) B9(*1) B7(*1) B9(*1) B7(*1) B9(*1) B7(*1) - - B9 B7 D24 CONT1 (*1,*2) - CONT1 (*1,*2) - CONT1 (*1,*2) - CONT1 (*1,*2) - - - - - D25 CONT2 (*1,*2) - CONT2 (*1,*2) - CONT2 (*1,*2) - CONT2 (*1,*2) - - - - - D26 B0(*1) - B0(*1) - B0(*1) - B0(*1) - - - B0 - D27 B1(*1) - B1(*1) - B1(*1) - B1(*1) - - - B1 - D28 G0(*1) - G0(*1) - G0(*1) - G0(*1) - Y0(*1) - G0(*1) - D29 G1(*1) - G1(*1) - G1(*1) - G1(*1) - Y1(*1) - G1(*1) - D30 R0(*1) - R0(*1) - R0(*1) - R0(*1) - Cb/Cr0(*1) - R0(*1) - D31 R1(*1) - R1(*1) - R1(*1) - R1(*1) - Cb/Cr1(*1) - R1(*1) - HSYNC HSYNC HSYNC HSYNC HSYNC HSYNC HSYNC HSYNC HSYNC HSYNC HSYNC HSYNC HSYNC VSYNC VSYNC VSYNC VSYNC VSYNC VSYNC VSYNC VSYNC VSYNC VSYNC VSYNC VSYNC VSYNC DE DE DE DE DE DE DE DE DE DE DE DE DE *1 CTL bits, which are carried during DE=0 except the first pixel and the last pixel (when COL1=0) or the first 3pixels and the last 3pixels (when COL1=1). *2 User defined data inputs (THCV235) and outputs (THCV236). |
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